1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=m68k-pc-linux -relocation-model=pic -verify-machineinstrs | FileCheck %s 3 4; 5; Pass all arguments on the stack in reverse order 6 7define i32 @test1() nounwind { 8; CHECK-LABEL: test1: 9; CHECK: ; %bb.0: ; %entry 10; CHECK-NEXT: suba.l #20, %sp 11; CHECK-NEXT: move.l #5, (16,%sp) 12; CHECK-NEXT: move.l #4, (12,%sp) 13; CHECK-NEXT: move.l #3, (8,%sp) 14; CHECK-NEXT: move.l #2, (4,%sp) 15; CHECK-NEXT: move.l #1, (%sp) 16; CHECK-NEXT: jsr (test1_callee@PLT,%pc) 17; CHECK-NEXT: moveq #0, %d0 18; CHECK-NEXT: adda.l #20, %sp 19; CHECK-NEXT: rts 20entry: 21 call void @test1_callee(i32 1, i32 2, i32 3, i32 4, i32 5) nounwind 22 ret i32 0 23} 24 25declare void @test1_callee(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e); 26 27define i16 @test2() nounwind { 28; CHECK-LABEL: test2: 29; CHECK: ; %bb.0: ; %entry 30; CHECK-NEXT: suba.l #20, %sp 31; CHECK-NEXT: move.l #5, (16,%sp) 32; CHECK-NEXT: move.l #4, (12,%sp) 33; CHECK-NEXT: move.l #3, (8,%sp) 34; CHECK-NEXT: move.l #2, (4,%sp) 35; CHECK-NEXT: move.l #1, (%sp) 36; CHECK-NEXT: jsr (test2_callee@PLT,%pc) 37; CHECK-NEXT: moveq #0, %d0 38; CHECK-NEXT: adda.l #20, %sp 39; CHECK-NEXT: rts 40entry: 41 call void @test2_callee(i16 1, i16 2, i16 3, i16 4, i16 5) nounwind 42 ret i16 0 43} 44 45declare void @test2_callee(i16 %a, i16 %b, i16 %c, i16 %d, i16 %e); 46 47define i8 @test3() nounwind { 48; CHECK-LABEL: test3: 49; CHECK: ; %bb.0: ; %entry 50; CHECK-NEXT: suba.l #20, %sp 51; CHECK-NEXT: move.l #5, (16,%sp) 52; CHECK-NEXT: move.l #4, (12,%sp) 53; CHECK-NEXT: move.l #3, (8,%sp) 54; CHECK-NEXT: move.l #2, (4,%sp) 55; CHECK-NEXT: move.l #1, (%sp) 56; CHECK-NEXT: jsr (test3_callee@PLT,%pc) 57; CHECK-NEXT: moveq #0, %d0 58; CHECK-NEXT: adda.l #20, %sp 59; CHECK-NEXT: rts 60entry: 61 call void @test3_callee(i8 1, i8 2, i8 3, i8 4, i8 5) nounwind 62 ret i8 0 63} 64 65declare void @test3_callee(i8 %a, i8 %b, i8 %c, i8 %d, i8 %e); 66