1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s 3 4define void @fdiv_v4f32(ptr %res, ptr %a0, ptr %a1) nounwind { 5; CHECK-LABEL: fdiv_v4f32: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: vld $vr0, $a1, 0 8; CHECK-NEXT: vld $vr1, $a2, 0 9; CHECK-NEXT: vfdiv.s $vr0, $vr0, $vr1 10; CHECK-NEXT: vst $vr0, $a0, 0 11; CHECK-NEXT: ret 12entry: 13 %v0 = load <4 x float>, ptr %a0 14 %v1 = load <4 x float>, ptr %a1 15 %v2 = fdiv <4 x float> %v0, %v1 16 store <4 x float> %v2, ptr %res 17 ret void 18} 19 20define void @fdiv_v2f64(ptr %res, ptr %a0, ptr %a1) nounwind { 21; CHECK-LABEL: fdiv_v2f64: 22; CHECK: # %bb.0: # %entry 23; CHECK-NEXT: vld $vr0, $a1, 0 24; CHECK-NEXT: vld $vr1, $a2, 0 25; CHECK-NEXT: vfdiv.d $vr0, $vr0, $vr1 26; CHECK-NEXT: vst $vr0, $a0, 0 27; CHECK-NEXT: ret 28entry: 29 %v0 = load <2 x double>, ptr %a0 30 %v1 = load <2 x double>, ptr %a1 31 %v2 = fdiv <2 x double> %v0, %v1 32 store <2 x double> %v2, ptr %res 33 ret void 34} 35 36;; 1.0 / vec 37define void @one_fdiv_v4f32(ptr %res, ptr %a0) nounwind { 38; CHECK-LABEL: one_fdiv_v4f32: 39; CHECK: # %bb.0: # %entry 40; CHECK-NEXT: vld $vr0, $a1, 0 41; CHECK-NEXT: vfrecip.s $vr0, $vr0 42; CHECK-NEXT: vst $vr0, $a0, 0 43; CHECK-NEXT: ret 44entry: 45 %v0 = load <4 x float>, ptr %a0 46 %div = fdiv <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %v0 47 store <4 x float> %div, ptr %res 48 ret void 49} 50 51define void @one_fdiv_v2f64(ptr %res, ptr %a0) nounwind { 52; CHECK-LABEL: one_fdiv_v2f64: 53; CHECK: # %bb.0: # %entry 54; CHECK-NEXT: vld $vr0, $a1, 0 55; CHECK-NEXT: vfrecip.d $vr0, $vr0 56; CHECK-NEXT: vst $vr0, $a0, 0 57; CHECK-NEXT: ret 58entry: 59 %v0 = load <2 x double>, ptr %a0 60 %div = fdiv <2 x double> <double 1.0, double 1.0>, %v0 61 store <2 x double> %div, ptr %res 62 ret void 63} 64