xref: /llvm-project/llvm/test/CodeGen/LoongArch/lsx/intrinsic-setallnez.ll (revision f3aa4416319aed198841401c6c9dc2e49afe2507)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
3
4declare i32 @llvm.loongarch.lsx.bnz.b(<16 x i8>)
5
6define i32 @lsx_bnz_b(<16 x i8> %va) nounwind {
7; CHECK-LABEL: lsx_bnz_b:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    vsetallnez.b $fcc0, $vr0
10; CHECK-NEXT:    bcnez $fcc0, .LBB0_2
11; CHECK-NEXT:  # %bb.1: # %entry
12; CHECK-NEXT:    addi.w $a0, $zero, 0
13; CHECK-NEXT:    ret
14; CHECK-NEXT:  .LBB0_2: # %entry
15; CHECK-NEXT:    addi.w $a0, $zero, 1
16; CHECK-NEXT:    ret
17entry:
18  %res = call i32 @llvm.loongarch.lsx.bnz.b(<16 x i8> %va)
19  ret i32 %res
20}
21
22declare i32 @llvm.loongarch.lsx.bnz.h(<8 x i16>)
23
24define i32 @lsx_bnz_h(<8 x i16> %va) nounwind {
25; CHECK-LABEL: lsx_bnz_h:
26; CHECK:       # %bb.0: # %entry
27; CHECK-NEXT:    vsetallnez.h $fcc0, $vr0
28; CHECK-NEXT:    bcnez $fcc0, .LBB1_2
29; CHECK-NEXT:  # %bb.1: # %entry
30; CHECK-NEXT:    addi.w $a0, $zero, 0
31; CHECK-NEXT:    ret
32; CHECK-NEXT:  .LBB1_2: # %entry
33; CHECK-NEXT:    addi.w $a0, $zero, 1
34; CHECK-NEXT:    ret
35entry:
36  %res = call i32 @llvm.loongarch.lsx.bnz.h(<8 x i16> %va)
37  ret i32 %res
38}
39
40declare i32 @llvm.loongarch.lsx.bnz.w(<4 x i32>)
41
42define i32 @lsx_bnz_w(<4 x i32> %va) nounwind {
43; CHECK-LABEL: lsx_bnz_w:
44; CHECK:       # %bb.0: # %entry
45; CHECK-NEXT:    vsetallnez.w $fcc0, $vr0
46; CHECK-NEXT:    bcnez $fcc0, .LBB2_2
47; CHECK-NEXT:  # %bb.1: # %entry
48; CHECK-NEXT:    addi.w $a0, $zero, 0
49; CHECK-NEXT:    ret
50; CHECK-NEXT:  .LBB2_2: # %entry
51; CHECK-NEXT:    addi.w $a0, $zero, 1
52; CHECK-NEXT:    ret
53entry:
54  %res = call i32 @llvm.loongarch.lsx.bnz.w(<4 x i32> %va)
55  ret i32 %res
56}
57
58declare i32 @llvm.loongarch.lsx.bnz.d(<2 x i64>)
59
60define i32 @lsx_bnz_d(<2 x i64> %va) nounwind {
61; CHECK-LABEL: lsx_bnz_d:
62; CHECK:       # %bb.0: # %entry
63; CHECK-NEXT:    vsetallnez.d $fcc0, $vr0
64; CHECK-NEXT:    bcnez $fcc0, .LBB3_2
65; CHECK-NEXT:  # %bb.1: # %entry
66; CHECK-NEXT:    addi.w $a0, $zero, 0
67; CHECK-NEXT:    ret
68; CHECK-NEXT:  .LBB3_2: # %entry
69; CHECK-NEXT:    addi.w $a0, $zero, 1
70; CHECK-NEXT:    ret
71entry:
72  %res = call i32 @llvm.loongarch.lsx.bnz.d(<2 x i64> %va)
73  ret i32 %res
74}
75