xref: /llvm-project/llvm/test/CodeGen/LoongArch/lsx/intrinsic-fcmp.ll (revision f3aa4416319aed198841401c6c9dc2e49afe2507) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
3
4declare <4 x i32> @llvm.loongarch.lsx.vfcmp.caf.s(<4 x float>, <4 x float>)
5
6define <4 x i32> @lsx_vfcmp_caf_s(<4 x float> %va, <4 x float> %vb) nounwind {
7; CHECK-LABEL: lsx_vfcmp_caf_s:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    vfcmp.caf.s $vr0, $vr0, $vr1
10; CHECK-NEXT:    ret
11entry:
12  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.caf.s(<4 x float> %va, <4 x float> %vb)
13  ret <4 x i32> %res
14}
15
16declare <2 x i64> @llvm.loongarch.lsx.vfcmp.caf.d(<2 x double>, <2 x double>)
17
18define <2 x i64> @lsx_vfcmp_caf_d(<2 x double> %va, <2 x double> %vb) nounwind {
19; CHECK-LABEL: lsx_vfcmp_caf_d:
20; CHECK:       # %bb.0: # %entry
21; CHECK-NEXT:    vfcmp.caf.d $vr0, $vr0, $vr1
22; CHECK-NEXT:    ret
23entry:
24  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.caf.d(<2 x double> %va, <2 x double> %vb)
25  ret <2 x i64> %res
26}
27
28declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cun.s(<4 x float>, <4 x float>)
29
30define <4 x i32> @lsx_vfcmp_cun_s(<4 x float> %va, <4 x float> %vb) nounwind {
31; CHECK-LABEL: lsx_vfcmp_cun_s:
32; CHECK:       # %bb.0: # %entry
33; CHECK-NEXT:    vfcmp.cun.s $vr0, $vr0, $vr1
34; CHECK-NEXT:    ret
35entry:
36  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cun.s(<4 x float> %va, <4 x float> %vb)
37  ret <4 x i32> %res
38}
39
40declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cun.d(<2 x double>, <2 x double>)
41
42define <2 x i64> @lsx_vfcmp_cun_d(<2 x double> %va, <2 x double> %vb) nounwind {
43; CHECK-LABEL: lsx_vfcmp_cun_d:
44; CHECK:       # %bb.0: # %entry
45; CHECK-NEXT:    vfcmp.cun.d $vr0, $vr0, $vr1
46; CHECK-NEXT:    ret
47entry:
48  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cun.d(<2 x double> %va, <2 x double> %vb)
49  ret <2 x i64> %res
50}
51
52declare <4 x i32> @llvm.loongarch.lsx.vfcmp.ceq.s(<4 x float>, <4 x float>)
53
54define <4 x i32> @lsx_vfcmp_ceq_s(<4 x float> %va, <4 x float> %vb) nounwind {
55; CHECK-LABEL: lsx_vfcmp_ceq_s:
56; CHECK:       # %bb.0: # %entry
57; CHECK-NEXT:    vfcmp.ceq.s $vr0, $vr0, $vr1
58; CHECK-NEXT:    ret
59entry:
60  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.ceq.s(<4 x float> %va, <4 x float> %vb)
61  ret <4 x i32> %res
62}
63
64declare <2 x i64> @llvm.loongarch.lsx.vfcmp.ceq.d(<2 x double>, <2 x double>)
65
66define <2 x i64> @lsx_vfcmp_ceq_d(<2 x double> %va, <2 x double> %vb) nounwind {
67; CHECK-LABEL: lsx_vfcmp_ceq_d:
68; CHECK:       # %bb.0: # %entry
69; CHECK-NEXT:    vfcmp.ceq.d $vr0, $vr0, $vr1
70; CHECK-NEXT:    ret
71entry:
72  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.ceq.d(<2 x double> %va, <2 x double> %vb)
73  ret <2 x i64> %res
74}
75
76declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cueq.s(<4 x float>, <4 x float>)
77
78define <4 x i32> @lsx_vfcmp_cueq_s(<4 x float> %va, <4 x float> %vb) nounwind {
79; CHECK-LABEL: lsx_vfcmp_cueq_s:
80; CHECK:       # %bb.0: # %entry
81; CHECK-NEXT:    vfcmp.cueq.s $vr0, $vr0, $vr1
82; CHECK-NEXT:    ret
83entry:
84  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cueq.s(<4 x float> %va, <4 x float> %vb)
85  ret <4 x i32> %res
86}
87
88declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cueq.d(<2 x double>, <2 x double>)
89
90define <2 x i64> @lsx_vfcmp_cueq_d(<2 x double> %va, <2 x double> %vb) nounwind {
91; CHECK-LABEL: lsx_vfcmp_cueq_d:
92; CHECK:       # %bb.0: # %entry
93; CHECK-NEXT:    vfcmp.cueq.d $vr0, $vr0, $vr1
94; CHECK-NEXT:    ret
95entry:
96  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cueq.d(<2 x double> %va, <2 x double> %vb)
97  ret <2 x i64> %res
98}
99
100declare <4 x i32> @llvm.loongarch.lsx.vfcmp.clt.s(<4 x float>, <4 x float>)
101
102define <4 x i32> @lsx_vfcmp_clt_s(<4 x float> %va, <4 x float> %vb) nounwind {
103; CHECK-LABEL: lsx_vfcmp_clt_s:
104; CHECK:       # %bb.0: # %entry
105; CHECK-NEXT:    vfcmp.clt.s $vr0, $vr0, $vr1
106; CHECK-NEXT:    ret
107entry:
108  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.clt.s(<4 x float> %va, <4 x float> %vb)
109  ret <4 x i32> %res
110}
111
112declare <2 x i64> @llvm.loongarch.lsx.vfcmp.clt.d(<2 x double>, <2 x double>)
113
114define <2 x i64> @lsx_vfcmp_clt_d(<2 x double> %va, <2 x double> %vb) nounwind {
115; CHECK-LABEL: lsx_vfcmp_clt_d:
116; CHECK:       # %bb.0: # %entry
117; CHECK-NEXT:    vfcmp.clt.d $vr0, $vr0, $vr1
118; CHECK-NEXT:    ret
119entry:
120  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.clt.d(<2 x double> %va, <2 x double> %vb)
121  ret <2 x i64> %res
122}
123
124declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cult.s(<4 x float>, <4 x float>)
125
126define <4 x i32> @lsx_vfcmp_cult_s(<4 x float> %va, <4 x float> %vb) nounwind {
127; CHECK-LABEL: lsx_vfcmp_cult_s:
128; CHECK:       # %bb.0: # %entry
129; CHECK-NEXT:    vfcmp.cult.s $vr0, $vr0, $vr1
130; CHECK-NEXT:    ret
131entry:
132  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cult.s(<4 x float> %va, <4 x float> %vb)
133  ret <4 x i32> %res
134}
135
136declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cult.d(<2 x double>, <2 x double>)
137
138define <2 x i64> @lsx_vfcmp_cult_d(<2 x double> %va, <2 x double> %vb) nounwind {
139; CHECK-LABEL: lsx_vfcmp_cult_d:
140; CHECK:       # %bb.0: # %entry
141; CHECK-NEXT:    vfcmp.cult.d $vr0, $vr0, $vr1
142; CHECK-NEXT:    ret
143entry:
144  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cult.d(<2 x double> %va, <2 x double> %vb)
145  ret <2 x i64> %res
146}
147
148declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cle.s(<4 x float>, <4 x float>)
149
150define <4 x i32> @lsx_vfcmp_cle_s(<4 x float> %va, <4 x float> %vb) nounwind {
151; CHECK-LABEL: lsx_vfcmp_cle_s:
152; CHECK:       # %bb.0: # %entry
153; CHECK-NEXT:    vfcmp.cle.s $vr0, $vr0, $vr1
154; CHECK-NEXT:    ret
155entry:
156  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cle.s(<4 x float> %va, <4 x float> %vb)
157  ret <4 x i32> %res
158}
159
160declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cle.d(<2 x double>, <2 x double>)
161
162define <2 x i64> @lsx_vfcmp_cle_d(<2 x double> %va, <2 x double> %vb) nounwind {
163; CHECK-LABEL: lsx_vfcmp_cle_d:
164; CHECK:       # %bb.0: # %entry
165; CHECK-NEXT:    vfcmp.cle.d $vr0, $vr0, $vr1
166; CHECK-NEXT:    ret
167entry:
168  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cle.d(<2 x double> %va, <2 x double> %vb)
169  ret <2 x i64> %res
170}
171
172declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cule.s(<4 x float>, <4 x float>)
173
174define <4 x i32> @lsx_vfcmp_cule_s(<4 x float> %va, <4 x float> %vb) nounwind {
175; CHECK-LABEL: lsx_vfcmp_cule_s:
176; CHECK:       # %bb.0: # %entry
177; CHECK-NEXT:    vfcmp.cule.s $vr0, $vr0, $vr1
178; CHECK-NEXT:    ret
179entry:
180  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cule.s(<4 x float> %va, <4 x float> %vb)
181  ret <4 x i32> %res
182}
183
184declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cule.d(<2 x double>, <2 x double>)
185
186define <2 x i64> @lsx_vfcmp_cule_d(<2 x double> %va, <2 x double> %vb) nounwind {
187; CHECK-LABEL: lsx_vfcmp_cule_d:
188; CHECK:       # %bb.0: # %entry
189; CHECK-NEXT:    vfcmp.cule.d $vr0, $vr0, $vr1
190; CHECK-NEXT:    ret
191entry:
192  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cule.d(<2 x double> %va, <2 x double> %vb)
193  ret <2 x i64> %res
194}
195
196declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cne.s(<4 x float>, <4 x float>)
197
198define <4 x i32> @lsx_vfcmp_cne_s(<4 x float> %va, <4 x float> %vb) nounwind {
199; CHECK-LABEL: lsx_vfcmp_cne_s:
200; CHECK:       # %bb.0: # %entry
201; CHECK-NEXT:    vfcmp.cne.s $vr0, $vr0, $vr1
202; CHECK-NEXT:    ret
203entry:
204  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cne.s(<4 x float> %va, <4 x float> %vb)
205  ret <4 x i32> %res
206}
207
208declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cne.d(<2 x double>, <2 x double>)
209
210define <2 x i64> @lsx_vfcmp_cne_d(<2 x double> %va, <2 x double> %vb) nounwind {
211; CHECK-LABEL: lsx_vfcmp_cne_d:
212; CHECK:       # %bb.0: # %entry
213; CHECK-NEXT:    vfcmp.cne.d $vr0, $vr0, $vr1
214; CHECK-NEXT:    ret
215entry:
216  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cne.d(<2 x double> %va, <2 x double> %vb)
217  ret <2 x i64> %res
218}
219
220declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cor.s(<4 x float>, <4 x float>)
221
222define <4 x i32> @lsx_vfcmp_cor_s(<4 x float> %va, <4 x float> %vb) nounwind {
223; CHECK-LABEL: lsx_vfcmp_cor_s:
224; CHECK:       # %bb.0: # %entry
225; CHECK-NEXT:    vfcmp.cor.s $vr0, $vr0, $vr1
226; CHECK-NEXT:    ret
227entry:
228  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cor.s(<4 x float> %va, <4 x float> %vb)
229  ret <4 x i32> %res
230}
231
232declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cor.d(<2 x double>, <2 x double>)
233
234define <2 x i64> @lsx_vfcmp_cor_d(<2 x double> %va, <2 x double> %vb) nounwind {
235; CHECK-LABEL: lsx_vfcmp_cor_d:
236; CHECK:       # %bb.0: # %entry
237; CHECK-NEXT:    vfcmp.cor.d $vr0, $vr0, $vr1
238; CHECK-NEXT:    ret
239entry:
240  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cor.d(<2 x double> %va, <2 x double> %vb)
241  ret <2 x i64> %res
242}
243
244declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cune.s(<4 x float>, <4 x float>)
245
246define <4 x i32> @lsx_vfcmp_cune_s(<4 x float> %va, <4 x float> %vb) nounwind {
247; CHECK-LABEL: lsx_vfcmp_cune_s:
248; CHECK:       # %bb.0: # %entry
249; CHECK-NEXT:    vfcmp.cune.s $vr0, $vr0, $vr1
250; CHECK-NEXT:    ret
251entry:
252  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cune.s(<4 x float> %va, <4 x float> %vb)
253  ret <4 x i32> %res
254}
255
256declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cune.d(<2 x double>, <2 x double>)
257
258define <2 x i64> @lsx_vfcmp_cune_d(<2 x double> %va, <2 x double> %vb) nounwind {
259; CHECK-LABEL: lsx_vfcmp_cune_d:
260; CHECK:       # %bb.0: # %entry
261; CHECK-NEXT:    vfcmp.cune.d $vr0, $vr0, $vr1
262; CHECK-NEXT:    ret
263entry:
264  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cune.d(<2 x double> %va, <2 x double> %vb)
265  ret <2 x i64> %res
266}
267
268declare <4 x i32> @llvm.loongarch.lsx.vfcmp.saf.s(<4 x float>, <4 x float>)
269
270define <4 x i32> @lsx_vfcmp_saf_s(<4 x float> %va, <4 x float> %vb) nounwind {
271; CHECK-LABEL: lsx_vfcmp_saf_s:
272; CHECK:       # %bb.0: # %entry
273; CHECK-NEXT:    vfcmp.saf.s $vr0, $vr0, $vr1
274; CHECK-NEXT:    ret
275entry:
276  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.saf.s(<4 x float> %va, <4 x float> %vb)
277  ret <4 x i32> %res
278}
279
280declare <2 x i64> @llvm.loongarch.lsx.vfcmp.saf.d(<2 x double>, <2 x double>)
281
282define <2 x i64> @lsx_vfcmp_saf_d(<2 x double> %va, <2 x double> %vb) nounwind {
283; CHECK-LABEL: lsx_vfcmp_saf_d:
284; CHECK:       # %bb.0: # %entry
285; CHECK-NEXT:    vfcmp.saf.d $vr0, $vr0, $vr1
286; CHECK-NEXT:    ret
287entry:
288  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.saf.d(<2 x double> %va, <2 x double> %vb)
289  ret <2 x i64> %res
290}
291
292declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sun.s(<4 x float>, <4 x float>)
293
294define <4 x i32> @lsx_vfcmp_sun_s(<4 x float> %va, <4 x float> %vb) nounwind {
295; CHECK-LABEL: lsx_vfcmp_sun_s:
296; CHECK:       # %bb.0: # %entry
297; CHECK-NEXT:    vfcmp.sun.s $vr0, $vr0, $vr1
298; CHECK-NEXT:    ret
299entry:
300  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sun.s(<4 x float> %va, <4 x float> %vb)
301  ret <4 x i32> %res
302}
303
304declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sun.d(<2 x double>, <2 x double>)
305
306define <2 x i64> @lsx_vfcmp_sun_d(<2 x double> %va, <2 x double> %vb) nounwind {
307; CHECK-LABEL: lsx_vfcmp_sun_d:
308; CHECK:       # %bb.0: # %entry
309; CHECK-NEXT:    vfcmp.sun.d $vr0, $vr0, $vr1
310; CHECK-NEXT:    ret
311entry:
312  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sun.d(<2 x double> %va, <2 x double> %vb)
313  ret <2 x i64> %res
314}
315
316declare <4 x i32> @llvm.loongarch.lsx.vfcmp.seq.s(<4 x float>, <4 x float>)
317
318define <4 x i32> @lsx_vfcmp_seq_s(<4 x float> %va, <4 x float> %vb) nounwind {
319; CHECK-LABEL: lsx_vfcmp_seq_s:
320; CHECK:       # %bb.0: # %entry
321; CHECK-NEXT:    vfcmp.seq.s $vr0, $vr0, $vr1
322; CHECK-NEXT:    ret
323entry:
324  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.seq.s(<4 x float> %va, <4 x float> %vb)
325  ret <4 x i32> %res
326}
327
328declare <2 x i64> @llvm.loongarch.lsx.vfcmp.seq.d(<2 x double>, <2 x double>)
329
330define <2 x i64> @lsx_vfcmp_seq_d(<2 x double> %va, <2 x double> %vb) nounwind {
331; CHECK-LABEL: lsx_vfcmp_seq_d:
332; CHECK:       # %bb.0: # %entry
333; CHECK-NEXT:    vfcmp.seq.d $vr0, $vr0, $vr1
334; CHECK-NEXT:    ret
335entry:
336  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.seq.d(<2 x double> %va, <2 x double> %vb)
337  ret <2 x i64> %res
338}
339
340declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sueq.s(<4 x float>, <4 x float>)
341
342define <4 x i32> @lsx_vfcmp_sueq_s(<4 x float> %va, <4 x float> %vb) nounwind {
343; CHECK-LABEL: lsx_vfcmp_sueq_s:
344; CHECK:       # %bb.0: # %entry
345; CHECK-NEXT:    vfcmp.sueq.s $vr0, $vr0, $vr1
346; CHECK-NEXT:    ret
347entry:
348  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sueq.s(<4 x float> %va, <4 x float> %vb)
349  ret <4 x i32> %res
350}
351
352declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sueq.d(<2 x double>, <2 x double>)
353
354define <2 x i64> @lsx_vfcmp_sueq_d(<2 x double> %va, <2 x double> %vb) nounwind {
355; CHECK-LABEL: lsx_vfcmp_sueq_d:
356; CHECK:       # %bb.0: # %entry
357; CHECK-NEXT:    vfcmp.sueq.d $vr0, $vr0, $vr1
358; CHECK-NEXT:    ret
359entry:
360  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sueq.d(<2 x double> %va, <2 x double> %vb)
361  ret <2 x i64> %res
362}
363
364declare <4 x i32> @llvm.loongarch.lsx.vfcmp.slt.s(<4 x float>, <4 x float>)
365
366define <4 x i32> @lsx_vfcmp_slt_s(<4 x float> %va, <4 x float> %vb) nounwind {
367; CHECK-LABEL: lsx_vfcmp_slt_s:
368; CHECK:       # %bb.0: # %entry
369; CHECK-NEXT:    vfcmp.slt.s $vr0, $vr0, $vr1
370; CHECK-NEXT:    ret
371entry:
372  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.slt.s(<4 x float> %va, <4 x float> %vb)
373  ret <4 x i32> %res
374}
375
376declare <2 x i64> @llvm.loongarch.lsx.vfcmp.slt.d(<2 x double>, <2 x double>)
377
378define <2 x i64> @lsx_vfcmp_slt_d(<2 x double> %va, <2 x double> %vb) nounwind {
379; CHECK-LABEL: lsx_vfcmp_slt_d:
380; CHECK:       # %bb.0: # %entry
381; CHECK-NEXT:    vfcmp.slt.d $vr0, $vr0, $vr1
382; CHECK-NEXT:    ret
383entry:
384  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.slt.d(<2 x double> %va, <2 x double> %vb)
385  ret <2 x i64> %res
386}
387
388declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sult.s(<4 x float>, <4 x float>)
389
390define <4 x i32> @lsx_vfcmp_sult_s(<4 x float> %va, <4 x float> %vb) nounwind {
391; CHECK-LABEL: lsx_vfcmp_sult_s:
392; CHECK:       # %bb.0: # %entry
393; CHECK-NEXT:    vfcmp.sult.s $vr0, $vr0, $vr1
394; CHECK-NEXT:    ret
395entry:
396  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sult.s(<4 x float> %va, <4 x float> %vb)
397  ret <4 x i32> %res
398}
399
400declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sult.d(<2 x double>, <2 x double>)
401
402define <2 x i64> @lsx_vfcmp_sult_d(<2 x double> %va, <2 x double> %vb) nounwind {
403; CHECK-LABEL: lsx_vfcmp_sult_d:
404; CHECK:       # %bb.0: # %entry
405; CHECK-NEXT:    vfcmp.sult.d $vr0, $vr0, $vr1
406; CHECK-NEXT:    ret
407entry:
408  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sult.d(<2 x double> %va, <2 x double> %vb)
409  ret <2 x i64> %res
410}
411
412declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sle.s(<4 x float>, <4 x float>)
413
414define <4 x i32> @lsx_vfcmp_sle_s(<4 x float> %va, <4 x float> %vb) nounwind {
415; CHECK-LABEL: lsx_vfcmp_sle_s:
416; CHECK:       # %bb.0: # %entry
417; CHECK-NEXT:    vfcmp.sle.s $vr0, $vr0, $vr1
418; CHECK-NEXT:    ret
419entry:
420  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sle.s(<4 x float> %va, <4 x float> %vb)
421  ret <4 x i32> %res
422}
423
424declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sle.d(<2 x double>, <2 x double>)
425
426define <2 x i64> @lsx_vfcmp_sle_d(<2 x double> %va, <2 x double> %vb) nounwind {
427; CHECK-LABEL: lsx_vfcmp_sle_d:
428; CHECK:       # %bb.0: # %entry
429; CHECK-NEXT:    vfcmp.sle.d $vr0, $vr0, $vr1
430; CHECK-NEXT:    ret
431entry:
432  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sle.d(<2 x double> %va, <2 x double> %vb)
433  ret <2 x i64> %res
434}
435
436declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sule.s(<4 x float>, <4 x float>)
437
438define <4 x i32> @lsx_vfcmp_sule_s(<4 x float> %va, <4 x float> %vb) nounwind {
439; CHECK-LABEL: lsx_vfcmp_sule_s:
440; CHECK:       # %bb.0: # %entry
441; CHECK-NEXT:    vfcmp.sule.s $vr0, $vr0, $vr1
442; CHECK-NEXT:    ret
443entry:
444  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sule.s(<4 x float> %va, <4 x float> %vb)
445  ret <4 x i32> %res
446}
447
448declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sule.d(<2 x double>, <2 x double>)
449
450define <2 x i64> @lsx_vfcmp_sule_d(<2 x double> %va, <2 x double> %vb) nounwind {
451; CHECK-LABEL: lsx_vfcmp_sule_d:
452; CHECK:       # %bb.0: # %entry
453; CHECK-NEXT:    vfcmp.sule.d $vr0, $vr0, $vr1
454; CHECK-NEXT:    ret
455entry:
456  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sule.d(<2 x double> %va, <2 x double> %vb)
457  ret <2 x i64> %res
458}
459
460declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sne.s(<4 x float>, <4 x float>)
461
462define <4 x i32> @lsx_vfcmp_sne_s(<4 x float> %va, <4 x float> %vb) nounwind {
463; CHECK-LABEL: lsx_vfcmp_sne_s:
464; CHECK:       # %bb.0: # %entry
465; CHECK-NEXT:    vfcmp.sne.s $vr0, $vr0, $vr1
466; CHECK-NEXT:    ret
467entry:
468  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sne.s(<4 x float> %va, <4 x float> %vb)
469  ret <4 x i32> %res
470}
471
472declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sne.d(<2 x double>, <2 x double>)
473
474define <2 x i64> @lsx_vfcmp_sne_d(<2 x double> %va, <2 x double> %vb) nounwind {
475; CHECK-LABEL: lsx_vfcmp_sne_d:
476; CHECK:       # %bb.0: # %entry
477; CHECK-NEXT:    vfcmp.sne.d $vr0, $vr0, $vr1
478; CHECK-NEXT:    ret
479entry:
480  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sne.d(<2 x double> %va, <2 x double> %vb)
481  ret <2 x i64> %res
482}
483
484declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sor.s(<4 x float>, <4 x float>)
485
486define <4 x i32> @lsx_vfcmp_sor_s(<4 x float> %va, <4 x float> %vb) nounwind {
487; CHECK-LABEL: lsx_vfcmp_sor_s:
488; CHECK:       # %bb.0: # %entry
489; CHECK-NEXT:    vfcmp.sor.s $vr0, $vr0, $vr1
490; CHECK-NEXT:    ret
491entry:
492  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sor.s(<4 x float> %va, <4 x float> %vb)
493  ret <4 x i32> %res
494}
495
496declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sor.d(<2 x double>, <2 x double>)
497
498define <2 x i64> @lsx_vfcmp_sor_d(<2 x double> %va, <2 x double> %vb) nounwind {
499; CHECK-LABEL: lsx_vfcmp_sor_d:
500; CHECK:       # %bb.0: # %entry
501; CHECK-NEXT:    vfcmp.sor.d $vr0, $vr0, $vr1
502; CHECK-NEXT:    ret
503entry:
504  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sor.d(<2 x double> %va, <2 x double> %vb)
505  ret <2 x i64> %res
506}
507
508declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sune.s(<4 x float>, <4 x float>)
509
510define <4 x i32> @lsx_vfcmp_sune_s(<4 x float> %va, <4 x float> %vb) nounwind {
511; CHECK-LABEL: lsx_vfcmp_sune_s:
512; CHECK:       # %bb.0: # %entry
513; CHECK-NEXT:    vfcmp.sune.s $vr0, $vr0, $vr1
514; CHECK-NEXT:    ret
515entry:
516  %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sune.s(<4 x float> %va, <4 x float> %vb)
517  ret <4 x i32> %res
518}
519
520declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sune.d(<2 x double>, <2 x double>)
521
522define <2 x i64> @lsx_vfcmp_sune_d(<2 x double> %va, <2 x double> %vb) nounwind {
523; CHECK-LABEL: lsx_vfcmp_sune_d:
524; CHECK:       # %bb.0: # %entry
525; CHECK-NEXT:    vfcmp.sune.d $vr0, $vr0, $vr1
526; CHECK-NEXT:    ret
527entry:
528  %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sune.d(<2 x double> %va, <2 x double> %vb)
529  ret <2 x i64> %res
530}
531