xref: /llvm-project/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sitofp.ll (revision f799f936929c232a16abc7c520a10fecadbf05f9)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
3
4define void @sitofp_v8i32_v8f32(ptr %res, ptr %in){
5; CHECK-LABEL: sitofp_v8i32_v8f32:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    xvld $xr0, $a1, 0
8; CHECK-NEXT:    xvffint.s.w $xr0, $xr0
9; CHECK-NEXT:    xvst $xr0, $a0, 0
10; CHECK-NEXT:    ret
11  %v0 = load <8 x i32>, ptr %in
12  %v1 = sitofp <8 x i32> %v0 to <8 x float>
13  store <8 x float> %v1, ptr %res
14  ret void
15}
16
17define void @sitofp_v4f64_v4f64(ptr %res, ptr %in){
18; CHECK-LABEL: sitofp_v4f64_v4f64:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    xvld $xr0, $a1, 0
21; CHECK-NEXT:    xvffint.d.l $xr0, $xr0
22; CHECK-NEXT:    xvst $xr0, $a0, 0
23; CHECK-NEXT:    ret
24  %v0 = load <4 x i64>, ptr %in
25  %v1 = sitofp <4 x i64> %v0 to <4 x double>
26  store <4 x double> %v1, ptr %res
27  ret void
28}
29
30define void @sitofp_v4i64_v4f32(ptr %res, ptr %in){
31; CHECK-LABEL: sitofp_v4i64_v4f32:
32; CHECK:       # %bb.0:
33; CHECK-NEXT:    xvld $xr0, $a1, 0
34; CHECK-NEXT:    xvffint.d.l $xr0, $xr0
35; CHECK-NEXT:    xvpermi.d $xr1, $xr0, 238
36; CHECK-NEXT:    xvfcvt.s.d $xr0, $xr1, $xr0
37; CHECK-NEXT:    vst $vr0, $a0, 0
38; CHECK-NEXT:    ret
39  %v0 = load <4 x i64>, ptr %in
40  %v1 = sitofp <4 x i64> %v0 to <4 x float>
41  store <4 x float> %v1, ptr %res
42  ret void
43}
44
45define void @sitofp_v4i32_v4f64(ptr %res, ptr %in){
46; CHECK-LABEL: sitofp_v4i32_v4f64:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    vld $vr0, $a1, 0
49; CHECK-NEXT:    vext2xv.d.w $xr0, $xr0
50; CHECK-NEXT:    xvffint.d.l $xr0, $xr0
51; CHECK-NEXT:    xvst $xr0, $a0, 0
52; CHECK-NEXT:    ret
53  %v0 = load <4 x i32>, ptr %in
54  %v1 = sitofp <4 x i32> %v0 to <4 x double>
55  store <4 x double> %v1, ptr %res
56  ret void
57}
58