1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s 3 4define void @fmul_v8f32(ptr %res, ptr %a0, ptr %a1) nounwind { 5; CHECK-LABEL: fmul_v8f32: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: xvld $xr0, $a1, 0 8; CHECK-NEXT: xvld $xr1, $a2, 0 9; CHECK-NEXT: xvfmul.s $xr0, $xr0, $xr1 10; CHECK-NEXT: xvst $xr0, $a0, 0 11; CHECK-NEXT: ret 12entry: 13 %v0 = load <8 x float>, ptr %a0 14 %v1 = load <8 x float>, ptr %a1 15 %v2 = fmul <8 x float> %v0, %v1 16 store <8 x float> %v2, ptr %res 17 ret void 18} 19 20define void @fmul_v4f64(ptr %res, ptr %a0, ptr %a1) nounwind { 21; CHECK-LABEL: fmul_v4f64: 22; CHECK: # %bb.0: # %entry 23; CHECK-NEXT: xvld $xr0, $a1, 0 24; CHECK-NEXT: xvld $xr1, $a2, 0 25; CHECK-NEXT: xvfmul.d $xr0, $xr0, $xr1 26; CHECK-NEXT: xvst $xr0, $a0, 0 27; CHECK-NEXT: ret 28entry: 29 %v0 = load <4 x double>, ptr %a0 30 %v1 = load <4 x double>, ptr %a1 31 %v2 = fmul <4 x double> %v0, %v1 32 store <4 x double> %v2, ptr %res 33 ret void 34} 35