1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s 3 4declare <8 x float> @llvm.loongarch.lasx.xvffint.s.w(<8 x i32>) 5 6define <8 x float> @lasx_xvffint_s_w(<8 x i32> %va) nounwind { 7; CHECK-LABEL: lasx_xvffint_s_w: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: xvffint.s.w $xr0, $xr0 10; CHECK-NEXT: ret 11entry: 12 %res = call <8 x float> @llvm.loongarch.lasx.xvffint.s.w(<8 x i32> %va) 13 ret <8 x float> %res 14} 15 16declare <4 x double> @llvm.loongarch.lasx.xvffint.d.l(<4 x i64>) 17 18define <4 x double> @lasx_xvffint_d_l(<4 x i64> %va) nounwind { 19; CHECK-LABEL: lasx_xvffint_d_l: 20; CHECK: # %bb.0: # %entry 21; CHECK-NEXT: xvffint.d.l $xr0, $xr0 22; CHECK-NEXT: ret 23entry: 24 %res = call <4 x double> @llvm.loongarch.lasx.xvffint.d.l(<4 x i64> %va) 25 ret <4 x double> %res 26} 27 28declare <8 x float> @llvm.loongarch.lasx.xvffint.s.wu(<8 x i32>) 29 30define <8 x float> @lasx_xvffint_s_wu(<8 x i32> %va) nounwind { 31; CHECK-LABEL: lasx_xvffint_s_wu: 32; CHECK: # %bb.0: # %entry 33; CHECK-NEXT: xvffint.s.wu $xr0, $xr0 34; CHECK-NEXT: ret 35entry: 36 %res = call <8 x float> @llvm.loongarch.lasx.xvffint.s.wu(<8 x i32> %va) 37 ret <8 x float> %res 38} 39 40declare <4 x double> @llvm.loongarch.lasx.xvffint.d.lu(<4 x i64>) 41 42define <4 x double> @lasx_xvffint_d_lu(<4 x i64> %va) nounwind { 43; CHECK-LABEL: lasx_xvffint_d_lu: 44; CHECK: # %bb.0: # %entry 45; CHECK-NEXT: xvffint.d.lu $xr0, $xr0 46; CHECK-NEXT: ret 47entry: 48 %res = call <4 x double> @llvm.loongarch.lasx.xvffint.d.lu(<4 x i64> %va) 49 ret <4 x double> %res 50} 51 52declare <4 x double> @llvm.loongarch.lasx.xvffintl.d.w(<8 x i32>) 53 54define <4 x double> @lasx_xvffintl_d_w(<8 x i32> %va) nounwind { 55; CHECK-LABEL: lasx_xvffintl_d_w: 56; CHECK: # %bb.0: # %entry 57; CHECK-NEXT: xvffintl.d.w $xr0, $xr0 58; CHECK-NEXT: ret 59entry: 60 %res = call <4 x double> @llvm.loongarch.lasx.xvffintl.d.w(<8 x i32> %va) 61 ret <4 x double> %res 62} 63 64declare <4 x double> @llvm.loongarch.lasx.xvffinth.d.w(<8 x i32>) 65 66define <4 x double> @lasx_xvffinth_d_w(<8 x i32> %va) nounwind { 67; CHECK-LABEL: lasx_xvffinth_d_w: 68; CHECK: # %bb.0: # %entry 69; CHECK-NEXT: xvffinth.d.w $xr0, $xr0 70; CHECK-NEXT: ret 71entry: 72 %res = call <4 x double> @llvm.loongarch.lasx.xvffinth.d.w(<8 x i32> %va) 73 ret <4 x double> %res 74} 75 76declare <8 x float> @llvm.loongarch.lasx.xvffint.s.l(<4 x i64>, <4 x i64>) 77 78define <8 x float> @lasx_xvffint_s_l(<4 x i64> %va, <4 x i64> %vb) nounwind { 79; CHECK-LABEL: lasx_xvffint_s_l: 80; CHECK: # %bb.0: # %entry 81; CHECK-NEXT: xvffint.s.l $xr0, $xr0, $xr1 82; CHECK-NEXT: ret 83entry: 84 %res = call <8 x float> @llvm.loongarch.lasx.xvffint.s.l(<4 x i64> %va, <4 x i64> %vb) 85 ret <8 x float> %res 86} 87