xref: /llvm-project/llvm/test/CodeGen/LoongArch/lasx/intrinsic-extl.ll (revision 83311b2b5d1b9869f9a7b265994394ea898448a2) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
3
4declare <4 x i64> @llvm.loongarch.lasx.xvextl.q.d(<4 x i64>)
5
6define <4 x i64> @lasx_xvextl_q_d(<4 x i64> %va) nounwind {
7; CHECK-LABEL: lasx_xvextl_q_d:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    xvextl.q.d $xr0, $xr0
10; CHECK-NEXT:    ret
11entry:
12  %res = call <4 x i64> @llvm.loongarch.lasx.xvextl.q.d(<4 x i64> %va)
13  ret <4 x i64> %res
14}
15
16declare <4 x i64> @llvm.loongarch.lasx.xvextl.qu.du(<4 x i64>)
17
18define <4 x i64> @lasx_xvextl_qu_du(<4 x i64> %va) nounwind {
19; CHECK-LABEL: lasx_xvextl_qu_du:
20; CHECK:       # %bb.0: # %entry
21; CHECK-NEXT:    xvextl.qu.du $xr0, $xr0
22; CHECK-NEXT:    ret
23entry:
24  %res = call <4 x i64> @llvm.loongarch.lasx.xvextl.qu.du(<4 x i64> %va)
25  ret <4 x i64> %res
26}
27