xref: /llvm-project/llvm/test/CodeGen/LoongArch/lasx/build-vector.ll (revision 985d64b03accbed8500a85372d716367d89b61be)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
3
4define void @buildvector_v32i8_splat(ptr %dst, i8 %a0) nounwind {
5; CHECK-LABEL: buildvector_v32i8_splat:
6; CHECK:       # %bb.0: # %entry
7; CHECK-NEXT:    xvreplgr2vr.b $xr0, $a1
8; CHECK-NEXT:    xvst $xr0, $a0, 0
9; CHECK-NEXT:    ret
10entry:
11  %insert = insertelement <32 x i8> undef, i8 %a0, i8 0
12  %splat = shufflevector <32 x i8> %insert, <32 x i8> undef, <32 x i32> zeroinitializer
13  store <32 x i8> %splat, ptr %dst
14  ret void
15}
16
17define void @buildvector_v16i16_splat(ptr %dst, i16 %a0) nounwind {
18; CHECK-LABEL: buildvector_v16i16_splat:
19; CHECK:       # %bb.0: # %entry
20; CHECK-NEXT:    xvreplgr2vr.h $xr0, $a1
21; CHECK-NEXT:    xvst $xr0, $a0, 0
22; CHECK-NEXT:    ret
23entry:
24  %insert = insertelement <16 x i16> undef, i16 %a0, i8 0
25  %splat = shufflevector <16 x i16> %insert, <16 x i16> undef, <16 x i32> zeroinitializer
26  store <16 x i16> %splat, ptr %dst
27  ret void
28}
29
30define void @buildvector_v8i32_splat(ptr %dst, i32 %a0) nounwind {
31; CHECK-LABEL: buildvector_v8i32_splat:
32; CHECK:       # %bb.0: # %entry
33; CHECK-NEXT:    xvreplgr2vr.w $xr0, $a1
34; CHECK-NEXT:    xvst $xr0, $a0, 0
35; CHECK-NEXT:    ret
36entry:
37  %insert = insertelement <8 x i32> undef, i32 %a0, i8 0
38  %splat = shufflevector <8 x i32> %insert, <8 x i32> undef, <8 x i32> zeroinitializer
39  store <8 x i32> %splat, ptr %dst
40  ret void
41}
42
43define void @buildvector_v4i64_splat(ptr %dst, i64 %a0) nounwind {
44; CHECK-LABEL: buildvector_v4i64_splat:
45; CHECK:       # %bb.0: # %entry
46; CHECK-NEXT:    xvreplgr2vr.d $xr0, $a1
47; CHECK-NEXT:    xvst $xr0, $a0, 0
48; CHECK-NEXT:    ret
49entry:
50  %insert = insertelement <4 x i64> undef, i64 %a0, i8 0
51  %splat = shufflevector <4 x i64> %insert, <4 x i64> undef, <4 x i32> zeroinitializer
52  store <4 x i64> %splat, ptr %dst
53  ret void
54}
55
56define void @buildvector_v8f32_splat(ptr %dst, float %a0) nounwind {
57; CHECK-LABEL: buildvector_v8f32_splat:
58; CHECK:       # %bb.0: # %entry
59; CHECK-NEXT:    # kill: def $f0 killed $f0 def $xr0
60; CHECK-NEXT:    xvreplve0.w $xr0, $xr0
61; CHECK-NEXT:    xvst $xr0, $a0, 0
62; CHECK-NEXT:    ret
63entry:
64  %insert = insertelement <8 x float> undef, float %a0, i8 0
65  %splat = shufflevector <8 x float> %insert, <8 x float> undef, <8 x i32> zeroinitializer
66  store <8 x float> %splat, ptr %dst
67  ret void
68}
69
70define void @buildvector_v4f64_splat(ptr %dst, double %a0) nounwind {
71; CHECK-LABEL: buildvector_v4f64_splat:
72; CHECK:       # %bb.0: # %entry
73; CHECK-NEXT:    # kill: def $f0_64 killed $f0_64 def $xr0
74; CHECK-NEXT:    xvreplve0.d $xr0, $xr0
75; CHECK-NEXT:    xvst $xr0, $a0, 0
76; CHECK-NEXT:    ret
77entry:
78  %insert = insertelement <4 x double> undef, double %a0, i8 0
79  %splat = shufflevector <4 x double> %insert, <4 x double> undef, <4 x i32> zeroinitializer
80  store <4 x double> %splat, ptr %dst
81  ret void
82}
83
84define void @buildvector_v32i8_const_splat(ptr %dst) nounwind {
85; CHECK-LABEL: buildvector_v32i8_const_splat:
86; CHECK:       # %bb.0: # %entry
87; CHECK-NEXT:    xvrepli.b $xr0, 1
88; CHECK-NEXT:    xvst $xr0, $a0, 0
89; CHECK-NEXT:    ret
90entry:
91  store <32 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, ptr %dst
92  ret void
93}
94
95define void @buildvector_v16i16_const_splat(ptr %dst) nounwind {
96; CHECK-LABEL: buildvector_v16i16_const_splat:
97; CHECK:       # %bb.0: # %entry
98; CHECK-NEXT:    xvrepli.h $xr0, 1
99; CHECK-NEXT:    xvst $xr0, $a0, 0
100; CHECK-NEXT:    ret
101entry:
102  store <16 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, ptr %dst
103  ret void
104}
105
106define void @buildvector_v8i32_const_splat(ptr %dst) nounwind {
107; CHECK-LABEL: buildvector_v8i32_const_splat:
108; CHECK:       # %bb.0: # %entry
109; CHECK-NEXT:    xvrepli.w $xr0, 1
110; CHECK-NEXT:    xvst $xr0, $a0, 0
111; CHECK-NEXT:    ret
112entry:
113  store <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, ptr %dst
114  ret void
115}
116
117define void @buildvector_v4i64_const_splat(ptr %dst) nounwind {
118; CHECK-LABEL: buildvector_v4i64_const_splat:
119; CHECK:       # %bb.0: # %entry
120; CHECK-NEXT:    xvrepli.d $xr0, 1
121; CHECK-NEXT:    xvst $xr0, $a0, 0
122; CHECK-NEXT:    ret
123entry:
124  store <4 x i64> <i64 1, i64 1, i64 1, i64 1>, ptr %dst
125  ret void
126}
127
128define void @buildvector_v2f32_const_splat(ptr %dst) nounwind {
129; CHECK-LABEL: buildvector_v2f32_const_splat:
130; CHECK:       # %bb.0: # %entry
131; CHECK-NEXT:    lu12i.w $a1, 260096
132; CHECK-NEXT:    xvreplgr2vr.w $xr0, $a1
133; CHECK-NEXT:    xvst $xr0, $a0, 0
134; CHECK-NEXT:    ret
135entry:
136  store <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, ptr %dst
137  ret void
138}
139
140define void @buildvector_v4f64_const_splat(ptr %dst) nounwind {
141; CHECK-LABEL: buildvector_v4f64_const_splat:
142; CHECK:       # %bb.0: # %entry
143; CHECK-NEXT:    lu52i.d $a1, $zero, 1023
144; CHECK-NEXT:    xvreplgr2vr.d $xr0, $a1
145; CHECK-NEXT:    xvst $xr0, $a0, 0
146; CHECK-NEXT:    ret
147entry:
148  store <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>, ptr %dst
149  ret void
150}
151
152define void @buildvector_v32i8_const(ptr %dst) nounwind {
153; CHECK-LABEL: buildvector_v32i8_const:
154; CHECK:       # %bb.0: # %entry
155; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI12_0)
156; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI12_0)
157; CHECK-NEXT:    xvst $xr0, $a0, 0
158; CHECK-NEXT:    ret
159entry:
160  store <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>, ptr %dst
161  ret void
162}
163
164define void @buildvector_v16i16_const(ptr %dst) nounwind {
165; CHECK-LABEL: buildvector_v16i16_const:
166; CHECK:       # %bb.0: # %entry
167; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI13_0)
168; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI13_0)
169; CHECK-NEXT:    xvst $xr0, $a0, 0
170; CHECK-NEXT:    ret
171entry:
172  store <16 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>, ptr %dst
173  ret void
174}
175
176define void @buildvector_v8i32_const(ptr %dst) nounwind {
177; CHECK-LABEL: buildvector_v8i32_const:
178; CHECK:       # %bb.0: # %entry
179; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI14_0)
180; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI14_0)
181; CHECK-NEXT:    xvst $xr0, $a0, 0
182; CHECK-NEXT:    ret
183entry:
184  store <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, ptr %dst
185  ret void
186}
187
188define void @buildvector_v4i64_const(ptr %dst) nounwind {
189; CHECK-LABEL: buildvector_v4i64_const:
190; CHECK:       # %bb.0: # %entry
191; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI15_0)
192; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI15_0)
193; CHECK-NEXT:    xvst $xr0, $a0, 0
194; CHECK-NEXT:    ret
195entry:
196  store <4 x i64> <i64 0, i64 1, i64 2, i64 3>, ptr %dst
197  ret void
198}
199
200define void @buildvector_v2f32_const(ptr %dst) nounwind {
201; CHECK-LABEL: buildvector_v2f32_const:
202; CHECK:       # %bb.0: # %entry
203; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI16_0)
204; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI16_0)
205; CHECK-NEXT:    xvst $xr0, $a0, 0
206; CHECK-NEXT:    ret
207entry:
208  store <8 x float> <float 0.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0>, ptr %dst
209  ret void
210}
211
212define void @buildvector_v4f64_const(ptr %dst) nounwind {
213; CHECK-LABEL: buildvector_v4f64_const:
214; CHECK:       # %bb.0: # %entry
215; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI17_0)
216; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI17_0)
217; CHECK-NEXT:    xvst $xr0, $a0, 0
218; CHECK-NEXT:    ret
219entry:
220  store <4 x double> <double 0.0, double 1.0, double 2.0, double 3.0>, ptr %dst
221  ret void
222}
223
224define void @buildvector_v32i8(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15, i8 %a16, i8 %a17, i8 %a18, i8 %a19, i8 %a20, i8 %a21, i8 %a22, i8 %a23, i8 %a24, i8 %a25, i8 %a26, i8 %a27, i8 %a28, i8 %a29, i8 %a30, i8 %a31) nounwind {
225; CHECK-LABEL: buildvector_v32i8:
226; CHECK:       # %bb.0: # %entry
227; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 0
228; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 1
229; CHECK-NEXT:    vinsgr2vr.b $vr0, $a3, 2
230; CHECK-NEXT:    vinsgr2vr.b $vr0, $a4, 3
231; CHECK-NEXT:    vinsgr2vr.b $vr0, $a5, 4
232; CHECK-NEXT:    ld.b $a1, $sp, 0
233; CHECK-NEXT:    vinsgr2vr.b $vr0, $a6, 5
234; CHECK-NEXT:    ld.b $a2, $sp, 8
235; CHECK-NEXT:    vinsgr2vr.b $vr0, $a7, 6
236; CHECK-NEXT:    ld.b $a3, $sp, 16
237; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 7
238; CHECK-NEXT:    ld.b $a1, $sp, 24
239; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 8
240; CHECK-NEXT:    ld.b $a2, $sp, 32
241; CHECK-NEXT:    vinsgr2vr.b $vr0, $a3, 9
242; CHECK-NEXT:    ld.b $a3, $sp, 40
243; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 10
244; CHECK-NEXT:    ld.b $a1, $sp, 48
245; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 11
246; CHECK-NEXT:    ld.b $a2, $sp, 56
247; CHECK-NEXT:    vinsgr2vr.b $vr0, $a3, 12
248; CHECK-NEXT:    ld.b $a3, $sp, 64
249; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 13
250; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 14
251; CHECK-NEXT:    ld.b $a1, $sp, 72
252; CHECK-NEXT:    vinsgr2vr.b $vr0, $a3, 15
253; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
254; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
255; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 0
256; CHECK-NEXT:    ld.b $a1, $sp, 80
257; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
258; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
259; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
260; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 1
261; CHECK-NEXT:    ld.b $a1, $sp, 88
262; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
263; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
264; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
265; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 2
266; CHECK-NEXT:    ld.b $a1, $sp, 96
267; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
268; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
269; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
270; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 3
271; CHECK-NEXT:    ld.b $a1, $sp, 104
272; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
273; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
274; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
275; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 4
276; CHECK-NEXT:    ld.b $a1, $sp, 112
277; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
278; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
279; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
280; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 5
281; CHECK-NEXT:    ld.b $a1, $sp, 120
282; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
283; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
284; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
285; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 6
286; CHECK-NEXT:    ld.b $a1, $sp, 128
287; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
288; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
289; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
290; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 7
291; CHECK-NEXT:    ld.b $a1, $sp, 136
292; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
293; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
294; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
295; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 8
296; CHECK-NEXT:    ld.b $a1, $sp, 144
297; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
298; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
299; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
300; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 9
301; CHECK-NEXT:    ld.b $a1, $sp, 152
302; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
303; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
304; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
305; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 10
306; CHECK-NEXT:    ld.b $a1, $sp, 160
307; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
308; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
309; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
310; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 11
311; CHECK-NEXT:    ld.b $a1, $sp, 168
312; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
313; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
314; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
315; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 12
316; CHECK-NEXT:    ld.b $a1, $sp, 176
317; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
318; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
319; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
320; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 13
321; CHECK-NEXT:    ld.b $a1, $sp, 184
322; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
323; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
324; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
325; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 14
326; CHECK-NEXT:    ld.b $a1, $sp, 192
327; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
328; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
329; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
330; CHECK-NEXT:    vinsgr2vr.b $vr1, $a1, 15
331; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
332; CHECK-NEXT:    xvst $xr0, $a0, 0
333; CHECK-NEXT:    ret
334entry:
335  %ins0  = insertelement <32 x i8> undef,  i8 %a0,  i32 0
336  %ins1  = insertelement <32 x i8> %ins0,  i8 %a1,  i32 1
337  %ins2  = insertelement <32 x i8> %ins1,  i8 %a2,  i32 2
338  %ins3  = insertelement <32 x i8> %ins2,  i8 %a3,  i32 3
339  %ins4  = insertelement <32 x i8> %ins3,  i8 %a4,  i32 4
340  %ins5  = insertelement <32 x i8> %ins4,  i8 %a5,  i32 5
341  %ins6  = insertelement <32 x i8> %ins5,  i8 %a6,  i32 6
342  %ins7  = insertelement <32 x i8> %ins6,  i8 %a7,  i32 7
343  %ins8  = insertelement <32 x i8> %ins7,  i8 %a8,  i32 8
344  %ins9  = insertelement <32 x i8> %ins8,  i8 %a9,  i32 9
345  %ins10 = insertelement <32 x i8> %ins9,  i8 %a10, i32 10
346  %ins11 = insertelement <32 x i8> %ins10, i8 %a11, i32 11
347  %ins12 = insertelement <32 x i8> %ins11, i8 %a12, i32 12
348  %ins13 = insertelement <32 x i8> %ins12, i8 %a13, i32 13
349  %ins14 = insertelement <32 x i8> %ins13, i8 %a14, i32 14
350  %ins15 = insertelement <32 x i8> %ins14, i8 %a15, i32 15
351  %ins16 = insertelement <32 x i8> %ins15, i8 %a16, i32 16
352  %ins17 = insertelement <32 x i8> %ins16, i8 %a17, i32 17
353  %ins18 = insertelement <32 x i8> %ins17, i8 %a18, i32 18
354  %ins19 = insertelement <32 x i8> %ins18, i8 %a19, i32 19
355  %ins20 = insertelement <32 x i8> %ins19, i8 %a20, i32 20
356  %ins21 = insertelement <32 x i8> %ins20, i8 %a21, i32 21
357  %ins22 = insertelement <32 x i8> %ins21, i8 %a22, i32 22
358  %ins23 = insertelement <32 x i8> %ins22, i8 %a23, i32 23
359  %ins24 = insertelement <32 x i8> %ins23, i8 %a24, i32 24
360  %ins25 = insertelement <32 x i8> %ins24, i8 %a25, i32 25
361  %ins26 = insertelement <32 x i8> %ins25, i8 %a26, i32 26
362  %ins27 = insertelement <32 x i8> %ins26, i8 %a27, i32 27
363  %ins28 = insertelement <32 x i8> %ins27, i8 %a28, i32 28
364  %ins29 = insertelement <32 x i8> %ins28, i8 %a29, i32 29
365  %ins30 = insertelement <32 x i8> %ins29, i8 %a30, i32 30
366  %ins31 = insertelement <32 x i8> %ins30, i8 %a31, i32 31
367  store <32 x i8> %ins31, ptr %dst
368  ret void
369}
370
371define void @buildvector_v16i16(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7, i16 %a8, i16 %a9, i16 %a10, i16 %a11, i16 %a12, i16 %a13, i16 %a14, i16 %a15) nounwind {
372; CHECK-LABEL: buildvector_v16i16:
373; CHECK:       # %bb.0: # %entry
374; CHECK-NEXT:    ld.h $t0, $sp, 8
375; CHECK-NEXT:    ld.h $t1, $sp, 0
376; CHECK-NEXT:    vinsgr2vr.h $vr0, $a1, 0
377; CHECK-NEXT:    vinsgr2vr.h $vr0, $a2, 1
378; CHECK-NEXT:    vinsgr2vr.h $vr0, $a3, 2
379; CHECK-NEXT:    vinsgr2vr.h $vr0, $a4, 3
380; CHECK-NEXT:    vinsgr2vr.h $vr0, $a5, 4
381; CHECK-NEXT:    vinsgr2vr.h $vr0, $a6, 5
382; CHECK-NEXT:    vinsgr2vr.h $vr0, $a7, 6
383; CHECK-NEXT:    vinsgr2vr.h $vr0, $t1, 7
384; CHECK-NEXT:    ld.h $a1, $sp, 16
385; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
386; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
387; CHECK-NEXT:    vinsgr2vr.h $vr1, $t0, 0
388; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
389; CHECK-NEXT:    ld.h $a2, $sp, 24
390; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
391; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
392; CHECK-NEXT:    vinsgr2vr.h $vr1, $a1, 1
393; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
394; CHECK-NEXT:    ld.h $a1, $sp, 32
395; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
396; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
397; CHECK-NEXT:    vinsgr2vr.h $vr1, $a2, 2
398; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
399; CHECK-NEXT:    ld.h $a2, $sp, 40
400; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
401; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
402; CHECK-NEXT:    vinsgr2vr.h $vr1, $a1, 3
403; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
404; CHECK-NEXT:    ld.h $a1, $sp, 48
405; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
406; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
407; CHECK-NEXT:    vinsgr2vr.h $vr1, $a2, 4
408; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
409; CHECK-NEXT:    ld.h $a2, $sp, 56
410; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
411; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
412; CHECK-NEXT:    vinsgr2vr.h $vr1, $a1, 5
413; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
414; CHECK-NEXT:    ld.h $a1, $sp, 64
415; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
416; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
417; CHECK-NEXT:    vinsgr2vr.h $vr1, $a2, 6
418; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
419; CHECK-NEXT:    xvori.b $xr1, $xr0, 0
420; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 1
421; CHECK-NEXT:    vinsgr2vr.h $vr1, $a1, 7
422; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
423; CHECK-NEXT:    xvst $xr0, $a0, 0
424; CHECK-NEXT:    ret
425entry:
426  %ins0  = insertelement <16 x i16> undef,  i16 %a0,  i32 0
427  %ins1  = insertelement <16 x i16> %ins0,  i16 %a1,  i32 1
428  %ins2  = insertelement <16 x i16> %ins1,  i16 %a2,  i32 2
429  %ins3  = insertelement <16 x i16> %ins2,  i16 %a3,  i32 3
430  %ins4  = insertelement <16 x i16> %ins3,  i16 %a4,  i32 4
431  %ins5  = insertelement <16 x i16> %ins4,  i16 %a5,  i32 5
432  %ins6  = insertelement <16 x i16> %ins5,  i16 %a6,  i32 6
433  %ins7  = insertelement <16 x i16> %ins6,  i16 %a7,  i32 7
434  %ins8  = insertelement <16 x i16> %ins7,  i16 %a8,  i32 8
435  %ins9  = insertelement <16 x i16> %ins8,  i16 %a9,  i32 9
436  %ins10 = insertelement <16 x i16> %ins9,  i16 %a10, i32 10
437  %ins11 = insertelement <16 x i16> %ins10, i16 %a11, i32 11
438  %ins12 = insertelement <16 x i16> %ins11, i16 %a12, i32 12
439  %ins13 = insertelement <16 x i16> %ins12, i16 %a13, i32 13
440  %ins14 = insertelement <16 x i16> %ins13, i16 %a14, i32 14
441  %ins15 = insertelement <16 x i16> %ins14, i16 %a15, i32 15
442  store <16 x i16> %ins15, ptr %dst
443  ret void
444}
445
446define void @buildvector_v8i32(ptr %dst, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind {
447; CHECK-LABEL: buildvector_v8i32:
448; CHECK:       # %bb.0: # %entry
449; CHECK-NEXT:    ld.w $t0, $sp, 0
450; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a1, 0
451; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a2, 1
452; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a3, 2
453; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a4, 3
454; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a5, 4
455; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a6, 5
456; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a7, 6
457; CHECK-NEXT:    xvinsgr2vr.w $xr0, $t0, 7
458; CHECK-NEXT:    xvst $xr0, $a0, 0
459; CHECK-NEXT:    ret
460entry:
461  %ins0 = insertelement <8 x i32> undef, i32 %a0, i32 0
462  %ins1 = insertelement <8 x i32> %ins0, i32 %a1, i32 1
463  %ins2 = insertelement <8 x i32> %ins1, i32 %a2, i32 2
464  %ins3 = insertelement <8 x i32> %ins2, i32 %a3, i32 3
465  %ins4 = insertelement <8 x i32> %ins3, i32 %a4, i32 4
466  %ins5 = insertelement <8 x i32> %ins4, i32 %a5, i32 5
467  %ins6 = insertelement <8 x i32> %ins5, i32 %a6, i32 6
468  %ins7 = insertelement <8 x i32> %ins6, i32 %a7, i32 7
469  store <8 x i32> %ins7, ptr %dst
470  ret void
471}
472
473define void @buildvector_v4i64(ptr %dst, i64 %a0, i64 %a1, i64 %a2, i64 %a3) nounwind {
474; CHECK-LABEL: buildvector_v4i64:
475; CHECK:       # %bb.0: # %entry
476; CHECK-NEXT:    xvinsgr2vr.d $xr0, $a1, 0
477; CHECK-NEXT:    xvinsgr2vr.d $xr0, $a2, 1
478; CHECK-NEXT:    xvinsgr2vr.d $xr0, $a3, 2
479; CHECK-NEXT:    xvinsgr2vr.d $xr0, $a4, 3
480; CHECK-NEXT:    xvst $xr0, $a0, 0
481; CHECK-NEXT:    ret
482entry:
483  %ins0 = insertelement <4 x i64> undef, i64 %a0, i32 0
484  %ins1 = insertelement <4 x i64> %ins0, i64 %a1, i32 1
485  %ins2 = insertelement <4 x i64> %ins1, i64 %a2, i32 2
486  %ins3 = insertelement <4 x i64> %ins2, i64 %a3, i32 3
487  store <4 x i64> %ins3, ptr %dst
488  ret void
489}
490
491define void @buildvector_v8f32(ptr %dst, float %a0, float %a1, float %a2, float %a3, float %a4, float %a5, float %a6, float %a7) nounwind {
492; CHECK-LABEL: buildvector_v8f32:
493; CHECK:       # %bb.0: # %entry
494; CHECK-NEXT:    movfr2gr.s $a1, $fa0
495; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a1, 0
496; CHECK-NEXT:    movfr2gr.s $a1, $fa1
497; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a1, 1
498; CHECK-NEXT:    movfr2gr.s $a1, $fa2
499; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a1, 2
500; CHECK-NEXT:    movfr2gr.s $a1, $fa3
501; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a1, 3
502; CHECK-NEXT:    movfr2gr.s $a1, $fa4
503; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a1, 4
504; CHECK-NEXT:    movfr2gr.s $a1, $fa5
505; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a1, 5
506; CHECK-NEXT:    movfr2gr.s $a1, $fa6
507; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a1, 6
508; CHECK-NEXT:    movfr2gr.s $a1, $fa7
509; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a1, 7
510; CHECK-NEXT:    xvst $xr0, $a0, 0
511; CHECK-NEXT:    ret
512entry:
513  %ins0 = insertelement <8 x float> undef, float %a0, i32 0
514  %ins1 = insertelement <8 x float> %ins0, float %a1, i32 1
515  %ins2 = insertelement <8 x float> %ins1, float %a2, i32 2
516  %ins3 = insertelement <8 x float> %ins2, float %a3, i32 3
517  %ins4 = insertelement <8 x float> %ins3, float %a4, i32 4
518  %ins5 = insertelement <8 x float> %ins4, float %a5, i32 5
519  %ins6 = insertelement <8 x float> %ins5, float %a6, i32 6
520  %ins7 = insertelement <8 x float> %ins6, float %a7, i32 7
521  store <8 x float> %ins7, ptr %dst
522  ret void
523}
524
525define void @buildvector_v4f64(ptr %dst, double %a0, double %a1, double %a2, double %a3) nounwind {
526; CHECK-LABEL: buildvector_v4f64:
527; CHECK:       # %bb.0: # %entry
528; CHECK-NEXT:    movfr2gr.d $a1, $fa0
529; CHECK-NEXT:    xvinsgr2vr.d $xr0, $a1, 0
530; CHECK-NEXT:    movfr2gr.d $a1, $fa1
531; CHECK-NEXT:    xvinsgr2vr.d $xr0, $a1, 1
532; CHECK-NEXT:    movfr2gr.d $a1, $fa2
533; CHECK-NEXT:    xvinsgr2vr.d $xr0, $a1, 2
534; CHECK-NEXT:    movfr2gr.d $a1, $fa3
535; CHECK-NEXT:    xvinsgr2vr.d $xr0, $a1, 3
536; CHECK-NEXT:    xvst $xr0, $a0, 0
537; CHECK-NEXT:    ret
538entry:
539  %ins0 = insertelement <4 x double> undef, double %a0, i32 0
540  %ins1 = insertelement <4 x double> %ins0, double %a1, i32 1
541  %ins2 = insertelement <4 x double> %ins1, double %a2, i32 2
542  %ins3 = insertelement <4 x double> %ins2, double %a3, i32 3
543  store <4 x double> %ins3, ptr %dst
544  ret void
545}
546