xref: /llvm-project/llvm/test/CodeGen/LoongArch/ir-instruction/shl.ll (revision 9d4f7f44b64d87d1068859906f43b7ce03a7388b)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch32 -mattr=+d < %s | FileCheck %s --check-prefix=LA32
3; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s --check-prefix=LA64
4
5;; Exercise the 'shl' LLVM IR: https://llvm.org/docs/LangRef.html#shl-instruction
6
7define i1 @shl_i1(i1 %x, i1 %y) {
8; LA32-LABEL: shl_i1:
9; LA32:       # %bb.0:
10; LA32-NEXT:    ret
11;
12; LA64-LABEL: shl_i1:
13; LA64:       # %bb.0:
14; LA64-NEXT:    ret
15  %shl = shl i1 %x, %y
16  ret i1 %shl
17}
18
19define i8 @shl_i8(i8 %x, i8 %y) {
20; LA32-LABEL: shl_i8:
21; LA32:       # %bb.0:
22; LA32-NEXT:    sll.w $a0, $a0, $a1
23; LA32-NEXT:    ret
24;
25; LA64-LABEL: shl_i8:
26; LA64:       # %bb.0:
27; LA64-NEXT:    sll.d $a0, $a0, $a1
28; LA64-NEXT:    ret
29  %shl = shl i8 %x, %y
30  ret i8 %shl
31}
32
33define i16 @shl_i16(i16 %x, i16 %y) {
34; LA32-LABEL: shl_i16:
35; LA32:       # %bb.0:
36; LA32-NEXT:    sll.w $a0, $a0, $a1
37; LA32-NEXT:    ret
38;
39; LA64-LABEL: shl_i16:
40; LA64:       # %bb.0:
41; LA64-NEXT:    sll.d $a0, $a0, $a1
42; LA64-NEXT:    ret
43  %shl = shl i16 %x, %y
44  ret i16 %shl
45}
46
47define i32 @shl_i32(i32 %x, i32 %y) {
48; LA32-LABEL: shl_i32:
49; LA32:       # %bb.0:
50; LA32-NEXT:    sll.w $a0, $a0, $a1
51; LA32-NEXT:    ret
52;
53; LA64-LABEL: shl_i32:
54; LA64:       # %bb.0:
55; LA64-NEXT:    sll.w $a0, $a0, $a1
56; LA64-NEXT:    ret
57  %shl = shl i32 %x, %y
58  ret i32 %shl
59}
60
61define i64 @shl_i64(i64 %x, i64 %y) {
62; LA32-LABEL: shl_i64:
63; LA32:       # %bb.0:
64; LA32-NEXT:    sll.w $a1, $a1, $a2
65; LA32-NEXT:    xori $a3, $a2, 31
66; LA32-NEXT:    srli.w $a4, $a0, 1
67; LA32-NEXT:    srl.w $a3, $a4, $a3
68; LA32-NEXT:    or $a1, $a1, $a3
69; LA32-NEXT:    addi.w $a3, $a2, -32
70; LA32-NEXT:    slti $a4, $a3, 0
71; LA32-NEXT:    maskeqz $a1, $a1, $a4
72; LA32-NEXT:    sll.w $a5, $a0, $a3
73; LA32-NEXT:    masknez $a4, $a5, $a4
74; LA32-NEXT:    or $a1, $a1, $a4
75; LA32-NEXT:    sll.w $a0, $a0, $a2
76; LA32-NEXT:    srai.w $a2, $a3, 31
77; LA32-NEXT:    and $a0, $a2, $a0
78; LA32-NEXT:    ret
79;
80; LA64-LABEL: shl_i64:
81; LA64:       # %bb.0:
82; LA64-NEXT:    sll.d $a0, $a0, $a1
83; LA64-NEXT:    ret
84  %shl = shl i64 %x, %y
85  ret i64 %shl
86}
87
88define i1 @shl_i1_3(i1 %x) {
89; LA32-LABEL: shl_i1_3:
90; LA32:       # %bb.0:
91; LA32-NEXT:    ret
92;
93; LA64-LABEL: shl_i1_3:
94; LA64:       # %bb.0:
95; LA64-NEXT:    ret
96  %shl = shl i1 %x, 3
97  ret i1 %shl
98}
99
100define i8 @shl_i8_3(i8 %x) {
101; LA32-LABEL: shl_i8_3:
102; LA32:       # %bb.0:
103; LA32-NEXT:    slli.w $a0, $a0, 3
104; LA32-NEXT:    ret
105;
106; LA64-LABEL: shl_i8_3:
107; LA64:       # %bb.0:
108; LA64-NEXT:    slli.d $a0, $a0, 3
109; LA64-NEXT:    ret
110  %shl = shl i8 %x, 3
111  ret i8 %shl
112}
113
114define i16 @shl_i16_3(i16 %x) {
115; LA32-LABEL: shl_i16_3:
116; LA32:       # %bb.0:
117; LA32-NEXT:    slli.w $a0, $a0, 3
118; LA32-NEXT:    ret
119;
120; LA64-LABEL: shl_i16_3:
121; LA64:       # %bb.0:
122; LA64-NEXT:    slli.d $a0, $a0, 3
123; LA64-NEXT:    ret
124  %shl = shl i16 %x, 3
125  ret i16 %shl
126}
127
128define i32 @shl_i32_3(i32 %x) {
129; LA32-LABEL: shl_i32_3:
130; LA32:       # %bb.0:
131; LA32-NEXT:    slli.w $a0, $a0, 3
132; LA32-NEXT:    ret
133;
134; LA64-LABEL: shl_i32_3:
135; LA64:       # %bb.0:
136; LA64-NEXT:    slli.d $a0, $a0, 3
137; LA64-NEXT:    ret
138  %shl = shl i32 %x, 3
139  ret i32 %shl
140}
141
142define i64 @shl_i64_3(i64 %x) {
143; LA32-LABEL: shl_i64_3:
144; LA32:       # %bb.0:
145; LA32-NEXT:    srli.w $a2, $a0, 29
146; LA32-NEXT:    slli.w $a1, $a1, 3
147; LA32-NEXT:    or $a1, $a1, $a2
148; LA32-NEXT:    slli.w $a0, $a0, 3
149; LA32-NEXT:    ret
150;
151; LA64-LABEL: shl_i64_3:
152; LA64:       # %bb.0:
153; LA64-NEXT:    slli.d $a0, $a0, 3
154; LA64-NEXT:    ret
155  %shl = shl i64 %x, 3
156  ret i64 %shl
157}
158