1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc --mtriple=loongarch32 -mattr=+d < %s | FileCheck %s --check-prefix=LA32 3; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s --check-prefix=LA64 4 5;; Exercise the 'or' LLVM IR: https://llvm.org/docs/LangRef.html#or-instruction 6 7define i1 @or_i1(i1 %a, i1 %b) { 8; LA32-LABEL: or_i1: 9; LA32: # %bb.0: # %entry 10; LA32-NEXT: or $a0, $a0, $a1 11; LA32-NEXT: ret 12; 13; LA64-LABEL: or_i1: 14; LA64: # %bb.0: # %entry 15; LA64-NEXT: or $a0, $a0, $a1 16; LA64-NEXT: ret 17entry: 18 %r = or i1 %a, %b 19 ret i1 %r 20} 21 22define i8 @or_i8(i8 %a, i8 %b) { 23; LA32-LABEL: or_i8: 24; LA32: # %bb.0: # %entry 25; LA32-NEXT: or $a0, $a0, $a1 26; LA32-NEXT: ret 27; 28; LA64-LABEL: or_i8: 29; LA64: # %bb.0: # %entry 30; LA64-NEXT: or $a0, $a0, $a1 31; LA64-NEXT: ret 32entry: 33 %r = or i8 %a, %b 34 ret i8 %r 35} 36 37define i16 @or_i16(i16 %a, i16 %b) { 38; LA32-LABEL: or_i16: 39; LA32: # %bb.0: # %entry 40; LA32-NEXT: or $a0, $a0, $a1 41; LA32-NEXT: ret 42; 43; LA64-LABEL: or_i16: 44; LA64: # %bb.0: # %entry 45; LA64-NEXT: or $a0, $a0, $a1 46; LA64-NEXT: ret 47entry: 48 %r = or i16 %a, %b 49 ret i16 %r 50} 51 52define i32 @or_i32(i32 %a, i32 %b) { 53; LA32-LABEL: or_i32: 54; LA32: # %bb.0: # %entry 55; LA32-NEXT: or $a0, $a0, $a1 56; LA32-NEXT: ret 57; 58; LA64-LABEL: or_i32: 59; LA64: # %bb.0: # %entry 60; LA64-NEXT: or $a0, $a0, $a1 61; LA64-NEXT: ret 62entry: 63 %r = or i32 %a, %b 64 ret i32 %r 65} 66 67define i64 @or_i64(i64 %a, i64 %b) { 68; LA32-LABEL: or_i64: 69; LA32: # %bb.0: # %entry 70; LA32-NEXT: or $a0, $a0, $a2 71; LA32-NEXT: or $a1, $a1, $a3 72; LA32-NEXT: ret 73; 74; LA64-LABEL: or_i64: 75; LA64: # %bb.0: # %entry 76; LA64-NEXT: or $a0, $a0, $a1 77; LA64-NEXT: ret 78entry: 79 %r = or i64 %a, %b 80 ret i64 %r 81} 82 83define i1 @or_i1_0(i1 %b) { 84; LA32-LABEL: or_i1_0: 85; LA32: # %bb.0: # %entry 86; LA32-NEXT: ret 87; 88; LA64-LABEL: or_i1_0: 89; LA64: # %bb.0: # %entry 90; LA64-NEXT: ret 91entry: 92 %r = or i1 4, %b 93 ret i1 %r 94} 95 96define i1 @or_i1_5(i1 %b) { 97; LA32-LABEL: or_i1_5: 98; LA32: # %bb.0: # %entry 99; LA32-NEXT: ori $a0, $zero, 1 100; LA32-NEXT: ret 101; 102; LA64-LABEL: or_i1_5: 103; LA64: # %bb.0: # %entry 104; LA64-NEXT: ori $a0, $zero, 1 105; LA64-NEXT: ret 106entry: 107 %r = or i1 5, %b 108 ret i1 %r 109} 110 111define i8 @or_i8_5(i8 %b) { 112; LA32-LABEL: or_i8_5: 113; LA32: # %bb.0: # %entry 114; LA32-NEXT: ori $a0, $a0, 5 115; LA32-NEXT: ret 116; 117; LA64-LABEL: or_i8_5: 118; LA64: # %bb.0: # %entry 119; LA64-NEXT: ori $a0, $a0, 5 120; LA64-NEXT: ret 121entry: 122 %r = or i8 5, %b 123 ret i8 %r 124} 125 126define i8 @or_i8_257(i8 %b) { 127; LA32-LABEL: or_i8_257: 128; LA32: # %bb.0: # %entry 129; LA32-NEXT: ori $a0, $a0, 1 130; LA32-NEXT: ret 131; 132; LA64-LABEL: or_i8_257: 133; LA64: # %bb.0: # %entry 134; LA64-NEXT: ori $a0, $a0, 1 135; LA64-NEXT: ret 136entry: 137 %r = or i8 257, %b 138 ret i8 %r 139} 140 141define i16 @or_i16_5(i16 %b) { 142; LA32-LABEL: or_i16_5: 143; LA32: # %bb.0: # %entry 144; LA32-NEXT: ori $a0, $a0, 5 145; LA32-NEXT: ret 146; 147; LA64-LABEL: or_i16_5: 148; LA64: # %bb.0: # %entry 149; LA64-NEXT: ori $a0, $a0, 5 150; LA64-NEXT: ret 151entry: 152 %r = or i16 5, %b 153 ret i16 %r 154} 155 156define i16 @or_i16_0x1000(i16 %b) { 157; LA32-LABEL: or_i16_0x1000: 158; LA32: # %bb.0: # %entry 159; LA32-NEXT: lu12i.w $a1, 1 160; LA32-NEXT: or $a0, $a0, $a1 161; LA32-NEXT: ret 162; 163; LA64-LABEL: or_i16_0x1000: 164; LA64: # %bb.0: # %entry 165; LA64-NEXT: lu12i.w $a1, 1 166; LA64-NEXT: or $a0, $a0, $a1 167; LA64-NEXT: ret 168entry: 169 %r = or i16 4096, %b 170 ret i16 %r 171} 172 173define i16 @or_i16_0x10001(i16 %b) { 174; LA32-LABEL: or_i16_0x10001: 175; LA32: # %bb.0: # %entry 176; LA32-NEXT: ori $a0, $a0, 1 177; LA32-NEXT: ret 178; 179; LA64-LABEL: or_i16_0x10001: 180; LA64: # %bb.0: # %entry 181; LA64-NEXT: ori $a0, $a0, 1 182; LA64-NEXT: ret 183entry: 184 %r = or i16 65537, %b 185 ret i16 %r 186} 187 188define i32 @or_i32_5(i32 %b) { 189; LA32-LABEL: or_i32_5: 190; LA32: # %bb.0: # %entry 191; LA32-NEXT: ori $a0, $a0, 5 192; LA32-NEXT: ret 193; 194; LA64-LABEL: or_i32_5: 195; LA64: # %bb.0: # %entry 196; LA64-NEXT: ori $a0, $a0, 5 197; LA64-NEXT: ret 198entry: 199 %r = or i32 5, %b 200 ret i32 %r 201} 202 203define i32 @or_i32_0x1000(i32 %b) { 204; LA32-LABEL: or_i32_0x1000: 205; LA32: # %bb.0: # %entry 206; LA32-NEXT: lu12i.w $a1, 1 207; LA32-NEXT: or $a0, $a0, $a1 208; LA32-NEXT: ret 209; 210; LA64-LABEL: or_i32_0x1000: 211; LA64: # %bb.0: # %entry 212; LA64-NEXT: lu12i.w $a1, 1 213; LA64-NEXT: or $a0, $a0, $a1 214; LA64-NEXT: ret 215entry: 216 %r = or i32 4096, %b 217 ret i32 %r 218} 219 220define i32 @or_i32_0x100000001(i32 %b) { 221; LA32-LABEL: or_i32_0x100000001: 222; LA32: # %bb.0: # %entry 223; LA32-NEXT: ori $a0, $a0, 1 224; LA32-NEXT: ret 225; 226; LA64-LABEL: or_i32_0x100000001: 227; LA64: # %bb.0: # %entry 228; LA64-NEXT: ori $a0, $a0, 1 229; LA64-NEXT: ret 230entry: 231 %r = or i32 4294967297, %b 232 ret i32 %r 233} 234 235define i64 @or_i64_5(i64 %b) { 236; LA32-LABEL: or_i64_5: 237; LA32: # %bb.0: # %entry 238; LA32-NEXT: ori $a0, $a0, 5 239; LA32-NEXT: ret 240; 241; LA64-LABEL: or_i64_5: 242; LA64: # %bb.0: # %entry 243; LA64-NEXT: ori $a0, $a0, 5 244; LA64-NEXT: ret 245entry: 246 %r = or i64 5, %b 247 ret i64 %r 248} 249 250define i64 @or_i64_0x1000(i64 %b) { 251; LA32-LABEL: or_i64_0x1000: 252; LA32: # %bb.0: # %entry 253; LA32-NEXT: lu12i.w $a2, 1 254; LA32-NEXT: or $a0, $a0, $a2 255; LA32-NEXT: ret 256; 257; LA64-LABEL: or_i64_0x1000: 258; LA64: # %bb.0: # %entry 259; LA64-NEXT: lu12i.w $a1, 1 260; LA64-NEXT: or $a0, $a0, $a1 261; LA64-NEXT: ret 262entry: 263 %r = or i64 4096, %b 264 ret i64 %r 265} 266