xref: /llvm-project/llvm/test/CodeGen/LoongArch/ir-instruction/icmp.ll (revision 9d4f7f44b64d87d1068859906f43b7ce03a7388b) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch32 -mattr=+d < %s | FileCheck %s --check-prefix=LA32
3; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s --check-prefix=LA64
4
5;; Exercise the 'icmp' LLVM IR: https://llvm.org/docs/LangRef.html#icmp-instruction
6
7define i1 @icmp_eq(i32 signext %a, i32 signext %b) {
8; LA32-LABEL: icmp_eq:
9; LA32:       # %bb.0:
10; LA32-NEXT:    xor $a0, $a0, $a1
11; LA32-NEXT:    sltui $a0, $a0, 1
12; LA32-NEXT:    ret
13;
14; LA64-LABEL: icmp_eq:
15; LA64:       # %bb.0:
16; LA64-NEXT:    xor $a0, $a0, $a1
17; LA64-NEXT:    sltui $a0, $a0, 1
18; LA64-NEXT:    ret
19  %res = icmp eq i32 %a, %b
20  ret i1 %res
21}
22
23define i1 @icmp_ne(i32 signext %a, i32 signext %b) {
24; LA32-LABEL: icmp_ne:
25; LA32:       # %bb.0:
26; LA32-NEXT:    xor $a0, $a0, $a1
27; LA32-NEXT:    sltu $a0, $zero, $a0
28; LA32-NEXT:    ret
29;
30; LA64-LABEL: icmp_ne:
31; LA64:       # %bb.0:
32; LA64-NEXT:    xor $a0, $a0, $a1
33; LA64-NEXT:    sltu $a0, $zero, $a0
34; LA64-NEXT:    ret
35  %res = icmp ne i32 %a, %b
36  ret i1 %res
37}
38
39define i1 @icmp_ugt(i32 signext %a, i32 signext %b) {
40; LA32-LABEL: icmp_ugt:
41; LA32:       # %bb.0:
42; LA32-NEXT:    sltu $a0, $a1, $a0
43; LA32-NEXT:    ret
44;
45; LA64-LABEL: icmp_ugt:
46; LA64:       # %bb.0:
47; LA64-NEXT:    sltu $a0, $a1, $a0
48; LA64-NEXT:    ret
49  %res = icmp ugt i32 %a, %b
50  ret i1 %res
51}
52
53define i1 @icmp_uge(i32 signext %a, i32 signext %b) {
54; LA32-LABEL: icmp_uge:
55; LA32:       # %bb.0:
56; LA32-NEXT:    sltu $a0, $a0, $a1
57; LA32-NEXT:    xori $a0, $a0, 1
58; LA32-NEXT:    ret
59;
60; LA64-LABEL: icmp_uge:
61; LA64:       # %bb.0:
62; LA64-NEXT:    sltu $a0, $a0, $a1
63; LA64-NEXT:    xori $a0, $a0, 1
64; LA64-NEXT:    ret
65  %res = icmp uge i32 %a, %b
66  ret i1 %res
67}
68
69define i1 @icmp_ult(i32 signext %a, i32 signext %b) {
70; LA32-LABEL: icmp_ult:
71; LA32:       # %bb.0:
72; LA32-NEXT:    sltu $a0, $a0, $a1
73; LA32-NEXT:    ret
74;
75; LA64-LABEL: icmp_ult:
76; LA64:       # %bb.0:
77; LA64-NEXT:    sltu $a0, $a0, $a1
78; LA64-NEXT:    ret
79  %res = icmp ult i32 %a, %b
80  ret i1 %res
81}
82
83define i1 @icmp_ule(i32 signext %a, i32 signext %b) {
84; LA32-LABEL: icmp_ule:
85; LA32:       # %bb.0:
86; LA32-NEXT:    sltu $a0, $a1, $a0
87; LA32-NEXT:    xori $a0, $a0, 1
88; LA32-NEXT:    ret
89;
90; LA64-LABEL: icmp_ule:
91; LA64:       # %bb.0:
92; LA64-NEXT:    sltu $a0, $a1, $a0
93; LA64-NEXT:    xori $a0, $a0, 1
94; LA64-NEXT:    ret
95  %res = icmp ule i32 %a, %b
96  ret i1 %res
97}
98
99define i1 @icmp_sgt(i32 signext %a, i32 signext %b) {
100; LA32-LABEL: icmp_sgt:
101; LA32:       # %bb.0:
102; LA32-NEXT:    slt $a0, $a1, $a0
103; LA32-NEXT:    ret
104;
105; LA64-LABEL: icmp_sgt:
106; LA64:       # %bb.0:
107; LA64-NEXT:    slt $a0, $a1, $a0
108; LA64-NEXT:    ret
109  %res = icmp sgt i32 %a, %b
110  ret i1 %res
111}
112
113define i1 @icmp_sge(i32 signext %a, i32 signext %b) {
114; LA32-LABEL: icmp_sge:
115; LA32:       # %bb.0:
116; LA32-NEXT:    slt $a0, $a0, $a1
117; LA32-NEXT:    xori $a0, $a0, 1
118; LA32-NEXT:    ret
119;
120; LA64-LABEL: icmp_sge:
121; LA64:       # %bb.0:
122; LA64-NEXT:    slt $a0, $a0, $a1
123; LA64-NEXT:    xori $a0, $a0, 1
124; LA64-NEXT:    ret
125  %res = icmp sge i32 %a, %b
126  ret i1 %res
127}
128
129define i1 @icmp_slt(i32 signext %a, i32 signext %b) {
130; LA32-LABEL: icmp_slt:
131; LA32:       # %bb.0:
132; LA32-NEXT:    slt $a0, $a0, $a1
133; LA32-NEXT:    ret
134;
135; LA64-LABEL: icmp_slt:
136; LA64:       # %bb.0:
137; LA64-NEXT:    slt $a0, $a0, $a1
138; LA64-NEXT:    ret
139  %res = icmp slt i32 %a, %b
140  ret i1 %res
141}
142
143define i1 @icmp_sle(i32 signext %a, i32 signext %b) {
144; LA32-LABEL: icmp_sle:
145; LA32:       # %bb.0:
146; LA32-NEXT:    slt $a0, $a1, $a0
147; LA32-NEXT:    xori $a0, $a0, 1
148; LA32-NEXT:    ret
149;
150; LA64-LABEL: icmp_sle:
151; LA64:       # %bb.0:
152; LA64-NEXT:    slt $a0, $a1, $a0
153; LA64-NEXT:    xori $a0, $a0, 1
154; LA64-NEXT:    ret
155  %res = icmp sle i32 %a, %b
156  ret i1 %res
157}
158
159define i1 @icmp_slt_3(i32 signext %a) {
160; LA32-LABEL: icmp_slt_3:
161; LA32:       # %bb.0:
162; LA32-NEXT:    slti $a0, $a0, 3
163; LA32-NEXT:    ret
164;
165; LA64-LABEL: icmp_slt_3:
166; LA64:       # %bb.0:
167; LA64-NEXT:    slti $a0, $a0, 3
168; LA64-NEXT:    ret
169  %res = icmp slt i32 %a, 3
170  ret i1 %res
171}
172
173define i1 @icmp_ult_3(i32 signext %a) {
174; LA32-LABEL: icmp_ult_3:
175; LA32:       # %bb.0:
176; LA32-NEXT:    sltui $a0, $a0, 3
177; LA32-NEXT:    ret
178;
179; LA64-LABEL: icmp_ult_3:
180; LA64:       # %bb.0:
181; LA64-NEXT:    sltui $a0, $a0, 3
182; LA64-NEXT:    ret
183  %res = icmp ult i32 %a, 3
184  ret i1 %res
185}
186
187define i1 @icmp_eq_0(i32 signext %a) {
188; LA32-LABEL: icmp_eq_0:
189; LA32:       # %bb.0:
190; LA32-NEXT:    sltui $a0, $a0, 1
191; LA32-NEXT:    ret
192;
193; LA64-LABEL: icmp_eq_0:
194; LA64:       # %bb.0:
195; LA64-NEXT:    sltui $a0, $a0, 1
196; LA64-NEXT:    ret
197  %res = icmp eq i32 %a, 0
198  ret i1 %res
199}
200
201define i1 @icmp_eq_3(i32 signext %a) {
202; LA32-LABEL: icmp_eq_3:
203; LA32:       # %bb.0:
204; LA32-NEXT:    addi.w $a0, $a0, -3
205; LA32-NEXT:    sltui $a0, $a0, 1
206; LA32-NEXT:    ret
207;
208; LA64-LABEL: icmp_eq_3:
209; LA64:       # %bb.0:
210; LA64-NEXT:    addi.d $a0, $a0, -3
211; LA64-NEXT:    sltui $a0, $a0, 1
212; LA64-NEXT:    ret
213  %res = icmp eq i32 %a, 3
214  ret i1 %res
215}
216
217define i1 @icmp_ne_0(i32 signext %a) {
218; LA32-LABEL: icmp_ne_0:
219; LA32:       # %bb.0:
220; LA32-NEXT:    sltu $a0, $zero, $a0
221; LA32-NEXT:    ret
222;
223; LA64-LABEL: icmp_ne_0:
224; LA64:       # %bb.0:
225; LA64-NEXT:    sltu $a0, $zero, $a0
226; LA64-NEXT:    ret
227  %res = icmp ne i32 %a, 0
228  ret i1 %res
229}
230
231define i1 @icmp_ne_3(i32 signext %a) {
232; LA32-LABEL: icmp_ne_3:
233; LA32:       # %bb.0:
234; LA32-NEXT:    addi.w $a0, $a0, -3
235; LA32-NEXT:    sltu $a0, $zero, $a0
236; LA32-NEXT:    ret
237;
238; LA64-LABEL: icmp_ne_3:
239; LA64:       # %bb.0:
240; LA64-NEXT:    addi.d $a0, $a0, -3
241; LA64-NEXT:    sltu $a0, $zero, $a0
242; LA64-NEXT:    ret
243  %res = icmp ne i32 %a, 3
244  ret i1 %res
245}
246