xref: /llvm-project/llvm/test/CodeGen/Hexagon/vec-vararg-align.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon < %s | FileCheck %s
2;
3; Check that the stack is aligned according to the outgoing function arguments.
4; CHECK: r29 = and(r29,#-64)
5
6target triple = "hexagon-unknown--elf"
7
8@.str = private unnamed_addr constant [32 x i8] c"\0AMixed Vectors, Pairs, int flt\0A\00", align 1
9@.str.1 = private unnamed_addr constant [11 x i8] c"\0AVar args\0A\00", align 1
10@gVec0 = common global <16 x i32> zeroinitializer, align 64
11@gVec10 = common global <32 x i32> zeroinitializer, align 128
12@gi1 = common global i32 0, align 4
13@gf1 = common global float 0.000000e+00, align 4
14
15define i32 @main() #0 {
16b0:
17  %v1 = call i32 (ptr, ...) @printf(ptr @.str) #0
18  %v2 = load <16 x i32>, ptr @gVec0, align 64
19  %v3 = load <32 x i32>, ptr @gVec10, align 128
20  %v4 = load i32, ptr @gi1, align 4
21  %v5 = load float, ptr @gf1, align 4
22  %v6 = fpext float %v5 to double
23  call void (ptr, i32, ...) @VarVec1(ptr @.str.1, i32 4, <16 x i32> %v2, <32 x i32> %v3, i32 %v4, double %v6)
24  ret i32 0
25}
26
27declare i32 @printf(ptr, ...) #0
28declare void @VarVec1(ptr, i32, ...) #0
29
30attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }
31