1; RUN: llc -mtriple=hexagon -mcpu=hexagonv62 -mtriple=hexagon-unknown-linux-musl -O0 < %s | FileCheck %s 2 3; CHECK-LABEL: foo: 4 5; Check Function prologue. 6; Note. All register numbers and offset are fixed. 7; Hence, no need of regular expression. 8 9; CHECK: r29 = add(r29,#-24) 10; CHECK: r7:6 = memd(r29+#24) 11; CHECK: memd(r29+#0) = r7:6 12; CHECK: r7:6 = memd(r29+#32) 13; CHECK: memd(r29+#8) = r7:6 14; CHECK: r7:6 = memd(r29+#40) 15; CHECK: memd(r29+#16) = r7:6 16; CHECK: memw(r29+#28) = r1 17; CHECK: memw(r29+#32) = r2 18; CHECK: memw(r29+#36) = r3 19; CHECK: memw(r29+#40) = r4 20; CHECK: memw(r29+#44) = r5 21; CHECK: r29 = add(r29,#24) 22 23%struct.AAA = type { i32, i32, i32, i32 } 24%struct.BBB = type { i8, i64, i32 } 25%struct.__va_list_tag = type { ptr, ptr, ptr } 26 27@aaa = global %struct.AAA { i32 100, i32 200, i32 300, i32 400 }, align 4 28@ddd = global { i8, i64, i32, [4 x i8] } { i8 1, i64 1000000, i32 5, [4 x i8] undef }, align 8 29@.str = private unnamed_addr constant [13 x i8] c"result = %d\0A\00", align 1 30 31; Function Attrs: nounwind 32define i32 @foo(i32 %xx, ptr byval(%struct.BBB) align 8 %eee, ...) #0 { 33entry: 34 %xx.addr = alloca i32, align 4 35 %ap = alloca [1 x %struct.__va_list_tag], align 8 36 %d = alloca i32, align 4 37 %k = alloca i64, align 8 38 %ret = alloca i32, align 4 39 %bbb = alloca %struct.AAA, align 4 40 store i32 %xx, ptr %xx.addr, align 4 41 store i32 0, ptr %ret, align 4 42 %0 = load i8, ptr %eee, align 1 43 %tobool = trunc i8 %0 to i1 44 br i1 %tobool, label %if.then, label %if.end 45 46if.then: ; preds = %entry 47 store i32 1, ptr %ret, align 4 48 br label %if.end 49 50if.end: ; preds = %if.then, %entry 51 call void @llvm.va_start(ptr %ap) 52 br label %vaarg.maybe_reg 53 54vaarg.maybe_reg: ; preds = %if.end 55 %__current_saved_reg_area_pointer = load ptr, ptr %ap 56 %__saved_reg_area_end_pointer_p = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 1 57 %__saved_reg_area_end_pointer = load ptr, ptr %__saved_reg_area_end_pointer_p 58 %1 = ptrtoint ptr %__current_saved_reg_area_pointer to i32 59 %align_current_saved_reg_area_pointer = add i32 %1, 7 60 %align_current_saved_reg_area_pointer3 = and i32 %align_current_saved_reg_area_pointer, -8 61 %align_current_saved_reg_area_pointer4 = inttoptr i32 %align_current_saved_reg_area_pointer3 to ptr 62 %__new_saved_reg_area_pointer = getelementptr i8, ptr %align_current_saved_reg_area_pointer4, i32 8 63 %2 = icmp sgt ptr %__new_saved_reg_area_pointer, %__saved_reg_area_end_pointer 64 br i1 %2, label %vaarg.on_stack, label %vaarg.in_reg 65 66vaarg.in_reg: ; preds = %vaarg.maybe_reg 67 store ptr %__new_saved_reg_area_pointer, ptr %ap 68 br label %vaarg.end 69 70vaarg.on_stack: ; preds = %vaarg.maybe_reg 71 %__overflow_area_pointer_p = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 2 72 %__overflow_area_pointer = load ptr, ptr %__overflow_area_pointer_p 73 %3 = ptrtoint ptr %__overflow_area_pointer to i32 74 %align_overflow_area_pointer = add i32 %3, 7 75 %align_overflow_area_pointer5 = and i32 %align_overflow_area_pointer, -8 76 %align_overflow_area_pointer6 = inttoptr i32 %align_overflow_area_pointer5 to ptr 77 %__overflow_area_pointer.next = getelementptr i8, ptr %align_overflow_area_pointer6, i32 8 78 store ptr %__overflow_area_pointer.next, ptr %__overflow_area_pointer_p 79 store ptr %__overflow_area_pointer.next, ptr %ap 80 br label %vaarg.end 81 82vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg 83 %vaarg.addr = phi ptr [ %align_current_saved_reg_area_pointer4, %vaarg.in_reg ], [ %align_overflow_area_pointer6, %vaarg.on_stack ] 84 %4 = load i64, ptr %vaarg.addr 85 store i64 %4, ptr %k, align 8 86 %5 = load i64, ptr %k, align 8 87 %conv = trunc i64 %5 to i32 88 %div = sdiv i32 %conv, 1000 89 %6 = load i32, ptr %ret, align 4 90 %add = add nsw i32 %6, %div 91 store i32 %add, ptr %ret, align 4 92 %__overflow_area_pointer_p8 = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 2 93 %__overflow_area_pointer9 = load ptr, ptr %__overflow_area_pointer_p8 94 %__overflow_area_pointer.next10 = getelementptr i8, ptr %__overflow_area_pointer9, i32 16 95 store ptr %__overflow_area_pointer.next10, ptr %__overflow_area_pointer_p8 96 call void @llvm.memcpy.p0.p0.i32(ptr %bbb, ptr %__overflow_area_pointer9, i32 16, i32 4, i1 false) 97 %d11 = getelementptr inbounds %struct.AAA, ptr %bbb, i32 0, i32 3 98 %7 = load i32, ptr %d11, align 4 99 %8 = load i32, ptr %ret, align 4 100 %add12 = add nsw i32 %8, %7 101 store i32 %add12, ptr %ret, align 4 102 br label %vaarg.maybe_reg14 103 104vaarg.maybe_reg14: ; preds = %vaarg.end 105 %__current_saved_reg_area_pointer16 = load ptr, ptr %ap 106 %__saved_reg_area_end_pointer_p17 = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 1 107 %__saved_reg_area_end_pointer18 = load ptr, ptr %__saved_reg_area_end_pointer_p17 108 %__new_saved_reg_area_pointer19 = getelementptr i8, ptr %__current_saved_reg_area_pointer16, i32 4 109 %9 = icmp sgt ptr %__new_saved_reg_area_pointer19, %__saved_reg_area_end_pointer18 110 br i1 %9, label %vaarg.on_stack21, label %vaarg.in_reg20 111 112vaarg.in_reg20: ; preds = %vaarg.maybe_reg14 113 store ptr %__new_saved_reg_area_pointer19, ptr %ap 114 br label %vaarg.end25 115 116vaarg.on_stack21: ; preds = %vaarg.maybe_reg14 117 %__overflow_area_pointer_p22 = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 2 118 %__overflow_area_pointer23 = load ptr, ptr %__overflow_area_pointer_p22 119 %__overflow_area_pointer.next24 = getelementptr i8, ptr %__overflow_area_pointer23, i32 4 120 store ptr %__overflow_area_pointer.next24, ptr %__overflow_area_pointer_p22 121 store ptr %__overflow_area_pointer.next24, ptr %ap 122 br label %vaarg.end25 123 124vaarg.end25: ; preds = %vaarg.on_stack21, %vaarg.in_reg20 125 %vaarg.addr26 = phi ptr [ %__current_saved_reg_area_pointer16, %vaarg.in_reg20 ], [ %__overflow_area_pointer23, %vaarg.on_stack21 ] 126 %10 = load i32, ptr %vaarg.addr26 127 store i32 %10, ptr %d, align 4 128 %11 = load i32, ptr %d, align 4 129 %12 = load i32, ptr %ret, align 4 130 %add27 = add nsw i32 %12, %11 131 store i32 %add27, ptr %ret, align 4 132 call void @llvm.va_end(ptr %ap) 133 %13 = load i32, ptr %ret, align 4 134 ret i32 %13 135} 136 137; Function Attrs: nounwind 138declare void @llvm.va_start(ptr) #1 139 140; Function Attrs: nounwind 141declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture readonly, i32, i32, i1) #1 142 143; Function Attrs: nounwind 144declare void @llvm.va_end(ptr) #1 145 146; Function Attrs: nounwind 147define i32 @main() #0 { 148entry: 149 %retval = alloca i32, align 4 150 %x = alloca i32, align 4 151 %m = alloca i64, align 8 152 store i32 0, ptr %retval 153 store i64 1000000, ptr %m, align 8 154 %0 = load i64, ptr %m, align 8 155 %call = call i32 (i32, ptr, ...) @foo(i32 1, ptr byval(%struct.BBB) align 8 @ddd, i64 %0, ptr byval(%struct.AAA) align 4 @aaa, i32 4) 156 store i32 %call, ptr %x, align 4 157 %1 = load i32, ptr %x, align 4 158 %call1 = call i32 (ptr, ...) @printf(ptr @.str, i32 %1) 159 %2 = load i32, ptr %x, align 4 160 ret i32 %2 161} 162 163declare i32 @printf(ptr, ...) #2 164 165attributes #1 = { nounwind } 166 167!llvm.ident = !{!0} 168 169!0 = !{!"Clang 3.1"} 170