1; RUN: llc -mtriple=hexagon < %s | FileCheck %s 2; CHECK: vaddh(r{{[0-9]+}},r{{[0-9]+}}) 3 4@g0 = external global i32 5@g1 = external global i32 6 7define void @f0() #0 { 8b0: 9 %v0 = load i32, ptr @g0, align 4 10 %v1 = load i32, ptr @g1, align 4 11 %v2 = call i32 @llvm.hexagon.A2.svaddh(i32 %v0, i32 %v1) 12 store i32 %v2, ptr @g1, align 4 13 ret void 14} 15 16declare i32 @llvm.hexagon.A2.svaddh(i32, i32) #1 17 18attributes #0 = { nounwind "target-cpu"="hexagonv5" } 19attributes #1 = { nounwind readnone "target-cpu"="hexagonv5" } 20