1; RUN: llc -mtriple=hexagon -mattr=+duplex -mcpu=hexagonv67t < %s | FileCheck %s 2 3; Check that we generate two memory operations in tiny core if duplexes 4; are enabled. 5 6; CHECK: { 7; CHECK: memw 8; CHECK-NEXT: memw 9; CHECK: } 10; CHECK: { 11; CHECK: memw 12; CHECK-NEXT: memw 13; CHECK: } 14 15define i32 @test(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, i32 %n) local_unnamed_addr #0 { 16entry: 17 %0 = load i32, ptr %a, align 4 18 %1 = load i32, ptr %b, align 4 19 %mul = mul nsw i32 %1, %0 20 %arrayidx.inc = getelementptr i32, ptr %a, i32 1 21 %arrayidx1.inc = getelementptr i32, ptr %b, i32 1 22 %2 = load i32, ptr %arrayidx.inc, align 4 23 %3 = load i32, ptr %arrayidx1.inc, align 4 24 %mul.1 = mul nsw i32 %3, %2 25 %add.1 = add nsw i32 %mul.1, %mul 26 ret i32 %add.1 27} 28