xref: /llvm-project/llvm/test/CodeGen/Hexagon/save-regs-thresh.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -O2 -spill-func-threshold=4 < %s | FileCheck %s --check-prefix=NOSAVE
2; RUN: llc -mtriple=hexagon -O2 -spill-func-threshold=2 < %s | FileCheck %s --check-prefix=SAVE
3; NOSAVE-NOT: call __save_r16_
4; SAVE: call __save_r16_
5
6target triple = "hexagon"
7
8%s.0 = type { %s.1, [50 x %s.2], i8, i32 }
9%s.1 = type { i8, i8, i8, i8, i8, i8, i8, i8, [2 x i8], [2 x i8], [4 x i8] }
10%s.2 = type { %s.3, [16 x i8] }
11%s.3 = type { %s.4, %s.5 }
12%s.4 = type { i8, i8, [2 x i8], [4 x i8] }
13%s.5 = type { i16, i16 }
14
15@g0 = private unnamed_addr constant [21 x i8] c"....................\00", align 1
16@g1 = internal unnamed_addr global [1 x ptr] zeroinitializer, align 4
17
18; Function Attrs: nounwind
19define void @f0(i8 zeroext %a0, ptr nocapture %a1) #0 {
20b0:
21  %v0 = tail call ptr @f1(i8 zeroext %a0, i32 1424, ptr @g0, i32 118) #0
22  %v2 = zext i8 %a0 to i32
23  %v3 = getelementptr inbounds [1 x ptr], ptr @g1, i32 0, i32 %v2
24  store ptr %v0, ptr %v3, align 4, !tbaa !0
25  store ptr %v0, ptr %a1, align 4, !tbaa !0
26  ret void
27}
28
29declare ptr @f1(i8 zeroext, i32, ptr, i32)
30
31; Function Attrs: nounwind
32define void @f2(i8 zeroext %a0) #0 {
33b0:
34  %v0 = zext i8 %a0 to i32
35  %v1 = getelementptr inbounds [1 x ptr], ptr @g1, i32 0, i32 %v0
36  %v2 = load ptr, ptr %v1, align 4, !tbaa !0
37  tail call void @f3(i8 zeroext %a0, ptr %v2, ptr @g0, i32 142) #0
38  store ptr null, ptr %v1, align 4, !tbaa !0
39  ret void
40}
41
42declare void @f3(i8 zeroext, ptr, ptr, i32)
43
44; Function Attrs: nounwind
45define void @f4(i8 zeroext %a0, i8 zeroext %a1, i8 zeroext %a2, i8 zeroext %a3, i8 zeroext %a4) #0 {
46b0:
47  %v0 = alloca [7 x i32], align 4
48  %v1 = zext i8 %a0 to i32
49  %v2 = getelementptr inbounds [1 x ptr], ptr @g1, i32 0, i32 %v1
50  %v3 = load ptr, ptr %v2, align 4, !tbaa !0
51  %v4 = getelementptr inbounds %s.0, ptr %v3, i32 0, i32 3
52  %v5 = load i32, ptr %v4, align 4, !tbaa !4
53  %v6 = and i32 %v5, 8
54  %v7 = icmp eq i32 %v6, 0
55  br i1 %v7, label %b2, label %b1
56
57b1:                                               ; preds = %b0
58  %v10 = call i32 @f5() #0
59  %v11 = getelementptr [7 x i32], ptr %v0, i32 0, i32 1
60  store i32 %v10, ptr %v11, align 4
61  %v12 = call zeroext i16 @f6(i8 zeroext %a0) #0
62  %v13 = zext i16 %v12 to i32
63  %v14 = shl nuw i32 %v13, 16
64  %v15 = or i32 %v14, 260
65  store i32 %v15, ptr %v0, align 4
66  %v16 = zext i8 %a1 to i32
67  %v17 = getelementptr [7 x i32], ptr %v0, i32 0, i32 2
68  %v18 = zext i8 %a2 to i32
69  %v19 = shl nuw nsw i32 %v18, 12
70  %v20 = zext i8 %a3 to i32
71  %v21 = shl nuw nsw i32 %v20, 16
72  %v22 = and i32 %v21, 458752
73  %v23 = and i32 %v19, 61440
74  %v24 = zext i8 %a4 to i32
75  %v25 = shl nuw nsw i32 %v24, 19
76  %v26 = and i32 %v25, 3670016
77  %v27 = or i32 %v23, %v16
78  %v28 = or i32 %v27, %v22
79  %v29 = or i32 %v28, %v26
80  %v30 = call zeroext i8 @f7(i8 zeroext %a0, i8 zeroext %a1) #0
81  %v31 = zext i8 %v30 to i32
82  %v32 = shl nuw nsw i32 %v31, 8
83  %v33 = and i32 %v32, 3840
84  %v34 = or i32 %v33, %v29
85  store i32 %v34, ptr %v17, align 4
86  %v35 = call i32 @f8(i32 %v1, ptr %v0) #0
87  br label %b2
88
89b2:                                               ; preds = %b1, %b0
90  ret void
91}
92
93declare i32 @f5()
94
95declare zeroext i16 @f6(i8 zeroext)
96
97declare zeroext i8 @f7(i8 zeroext, i8 zeroext)
98
99declare i32 @f8(...)
100
101attributes #0 = { nounwind }
102
103!0 = !{!1, !1, i64 0}
104!1 = !{!"any pointer", !2}
105!2 = !{!"omnipotent char", !3}
106!3 = !{!"Simple C/C++ TBAA"}
107!4 = !{!5, !5, i64 0}
108!5 = !{!"long", !2}
109