xref: /llvm-project/llvm/test/CodeGen/Hexagon/predtfrs.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -hexagon-expand-condsets=0 < %s | FileCheck %s
2
3; CHECK: cmp.gt
4; CHECK-NOT: r1 = p0
5; CHECK-NOT: p0 = r1
6; CHECK: mux
7
8%s.0 = type { i32 }
9%s.1 = type { i64 }
10
11@g0 = common global i16 0, align 2
12
13; Function Attrs: nounwind
14define void @f0(ptr nocapture %a0, ptr nocapture %a1, ptr nocapture %a2) #0 {
15b0:
16  %v0 = load i16, ptr @g0, align 2, !tbaa !0
17  %v1 = icmp eq i16 %v0, 3
18  %v2 = select i1 %v1, i32 -1, i32 34
19  %v4 = load i32, ptr %a0, align 4
20  %v5 = zext i32 %v4 to i64
21  %v6 = getelementptr inbounds %s.0, ptr %a0, i32 1, i32 0
22  %v7 = load i32, ptr %v6, align 4
23  %v8 = zext i32 %v7 to i64
24  %v9 = shl nuw i64 %v8, 32
25  %v10 = or i64 %v9, %v5
26  %v12 = load i64, ptr %a1, align 8, !tbaa !4
27  %v13 = tail call i64 @llvm.hexagon.M2.vrcmpyr.s0(i64 %v10, i64 %v12)
28  %v14 = tail call i64 @llvm.hexagon.S2.asr.i.p(i64 %v13, i32 14)
29  %v15 = lshr i64 %v14, 32
30  %v16 = trunc i64 %v15 to i32
31  %v17 = tail call i32 @llvm.hexagon.C2.cmpgti(i32 %v16, i32 0)
32  %v18 = trunc i64 %v14 to i32
33  %v19 = tail call i32 @llvm.hexagon.C2.mux(i32 %v17, i32 %v2, i32 %v18)
34  %v20 = zext i32 %v19 to i64
35  %v21 = getelementptr inbounds %s.1, ptr %a2, i32 2, i32 0
36  store i64 %v20, ptr %v21, align 8
37  ret void
38}
39
40; Function Attrs: nounwind readnone
41declare i64 @llvm.hexagon.M2.vrcmpyr.s0(i64, i64) #1
42
43; Function Attrs: nounwind readnone
44declare i64 @llvm.hexagon.S2.asr.i.p(i64, i32) #1
45
46; Function Attrs: nounwind readnone
47declare i32 @llvm.hexagon.C2.cmpgti(i32, i32) #1
48
49; Function Attrs: nounwind readnone
50declare i32 @llvm.hexagon.C2.mux(i32, i32, i32) #1
51
52attributes #0 = { nounwind }
53attributes #1 = { nounwind readnone }
54
55!0 = !{!1, !1, i64 0}
56!1 = !{!"short", !2}
57!2 = !{!"omnipotent char", !3}
58!3 = !{!"Simple C/C++ TBAA"}
59!4 = !{!5, !5, i64 0}
60!5 = !{!"long long", !2}
61