xref: /llvm-project/llvm/test/CodeGen/Hexagon/predicate-copy.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=hexagon < %s | FileCheck %s
3
4define i1 @f0(i32 %a0) #0 {
5; CHECK-LABEL: f0:
6; CHECK:       // %bb.0: // %b0
7; CHECK-NEXT:    {
8; CHECK-NEXT:     p0 = cmp.eq(r0,#0)
9; CHECK-NEXT:    }
10; CHECK-NEXT:    {
11; CHECK-NEXT:     r0 = mux(p0,#0,#1)
12; CHECK-NEXT:     jumpr r31
13; CHECK-NEXT:    }
14b0:
15  %v0 = icmp ne i32 %a0, 0
16  ret i1 %v0
17}
18
19attributes #0 = { nounwind "target-cpu"="hexagonv66" }
20