xref: /llvm-project/llvm/test/CodeGen/Hexagon/postinc-baseoffset.mir (revision 2208c97c1bec2512d4e47b6223db6d95a7037956) 
1# RUN: llc -mtriple=hexagon -start-before hexagon-packetizer %s -o - | FileCheck %s
2
3# Check that we don't packetize these two instructions together. It happened
4# earlier because "offset" in the post-increment instruction was taken to be 8.
5
6# CHECK: memw(r0+#0) = #-1
7# CHECK: }
8# CHECK: {
9# CHECK: r1 = memw(r0++#8)
10
11--- |
12  define void @fred(ptr %a) { ret void }
13...
14---
15name: fred
16tracksRegLiveness: true
17
18body: |
19  bb.0:
20    liveins: $r0
21      S4_storeiri_io $r0, 0, -1 :: (store (s32) into %ir.a)
22      $r1, $r0 = L2_loadri_pi $r0, 8 :: (load (s32) from %ir.a)
23