xref: /llvm-project/llvm/test/CodeGen/Hexagon/ntstbit.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=hexagon < %s | FileCheck %s
3
4; Function Attrs: nounwind
5define i32 @f0(i32 %a0, i32 %a1, i32 %a2) #0 {
6; CHECK-LABEL: f0:
7; CHECK:       // %bb.0: // %b0
8; CHECK-NEXT:    {
9; CHECK-NEXT:     p0 = !tstbit(r1,r2)
10; CHECK-NEXT:     r17:16 = combine(r1,r0)
11; CHECK-NEXT:     memd(r29+#-16) = r17:16
12; CHECK-NEXT:     allocframe(#8)
13; CHECK-NEXT:    } // 8-byte Folded Spill
14; CHECK-NEXT:    {
15; CHECK-NEXT:     if (p0) jump:nt .LBB0_2
16; CHECK-NEXT:    }
17; CHECK-NEXT:  // %bb.1: // %b1
18; CHECK-NEXT:    {
19; CHECK-NEXT:     call f1
20; CHECK-NEXT:    }
21; CHECK-NEXT:    {
22; CHECK-NEXT:     jump .LBB0_3
23; CHECK-NEXT:    }
24; CHECK-NEXT:  .LBB0_2: // %b2
25; CHECK-NEXT:    {
26; CHECK-NEXT:     call f2
27; CHECK-NEXT:    }
28; CHECK-NEXT:  .LBB0_3: // %b3
29; CHECK-NEXT:    {
30; CHECK-NEXT:     call f3
31; CHECK-NEXT:     r1 = add(r17,#2)
32; CHECK-NEXT:     r0 = r16
33; CHECK-NEXT:    }
34; CHECK-NEXT:    {
35; CHECK-NEXT:     r0 = #0
36; CHECK-NEXT:     r17:16 = memd(r29+#0)
37; CHECK-NEXT:     dealloc_return
38; CHECK-NEXT:    } // 8-byte Folded Reload
39b0:
40  %v0 = shl i32 1, %a2
41  %v1 = and i32 %v0, %a1
42  %v2 = icmp eq i32 %v1, 0
43  br i1 %v2, label %b2, label %b1
44
45b1:                                               ; preds = %b0
46  tail call void @f1() #0
47  br label %b3
48
49b2:                                               ; preds = %b0
50  %v3 = tail call i32 @f2() #0
51  br label %b3
52
53b3:                                               ; preds = %b2, %b1
54  %v4 = add nsw i32 %a1, 2
55  %v5 = tail call i32 @f3(i32 %a0, i32 %v4) #0
56  ret i32 0
57}
58
59declare void @f1(...)
60
61declare i32 @f2(...)
62
63declare i32 @f3(...)
64
65attributes #0 = { nounwind }
66