1; RUN: llc -mtriple=hexagon < %s | FileCheck %s 2; Check if only one transfer immediate instruction is generated for init.end block. 3; Since the transfer immediate of address operand is declared as not cheap, it 4; should generate only one transfer immediate, rather than two of them. 5 6; CHECK-LABEL: .LBB{{.*}} 7; CHECK: r0 = ##_ZZ3foovE1x 8; CHECK-NOT: r{{[1-9]*}} = ##_ZZ3foovE1x 9; CHECK: memw(r0+#0) += #1 10; CHECK: r{{.*}} = dealloc_return 11 12%struct.FooBaz = type { i32 } 13@_ZZ3foovE1x = internal global %struct.FooBaz zeroinitializer, align 4 14@_ZGVZ3foovE1x = internal global i64 0, section ".bss._ZGVZ3foovE1x", align 8 15@__dso_handle = external dso_local global i8 16 17define dso_local ptr @_Z3foov() local_unnamed_addr optsize { 18entry: 19 %0 = load atomic i8, ptr @_ZGVZ3foovE1x acquire, align 8 20 %guard.uninitialized = icmp eq i8 %0, 0 21 br i1 %guard.uninitialized, label %init.check, label %init.end 22 23init.check: ; preds = %entry 24 %1 = tail call i32 @__cxa_guard_acquire(ptr nonnull @_ZGVZ3foovE1x) 25 %tobool = icmp eq i32 %1, 0 26 br i1 %tobool, label %init.end, label %init 27 28init: ; preds = %init.check 29 tail call void @_ZN6FooBazC1Ev(ptr nonnull @_ZZ3foovE1x) 30 %2 = tail call i32 @__cxa_atexit(ptr @_ZN6FooBazD1Ev, ptr @_ZZ3foovE1x, ptr nonnull @__dso_handle) 31 tail call void @__cxa_guard_release(ptr nonnull @_ZGVZ3foovE1x) 32 br label %init.end 33 34init.end: ; preds = %init, %init.check, %entry 35 %3 = load i32, ptr @_ZZ3foovE1x, align 4 36 %inc = add nsw i32 %3, 1 37 store i32 %inc, ptr @_ZZ3foovE1x, align 4 38 ret ptr @_ZZ3foovE1x 39} 40 41declare dso_local i32 @__cxa_guard_acquire(ptr) local_unnamed_addr 42declare dso_local void @_ZN6FooBazC1Ev(ptr) unnamed_addr 43declare dso_local void @_ZN6FooBazD1Ev(ptr) unnamed_addr 44declare dso_local i32 @__cxa_atexit(ptr, ptr, ptr) local_unnamed_addr 45declare dso_local void @__cxa_guard_release(ptr) local_unnamed_addr 46