xref: /llvm-project/llvm/test/CodeGen/Hexagon/nbench1.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -O3 < %s | FileCheck %s
2
3; if instruction being considered for addition to packet has higher latency,
4; end existing packet and start a new one.
5
6; CHECK: .LBB0_4:
7; CHECK: p{{[0-3]+}} = cmp.gtu(r{{[0-9]+}},r{{[0-9]+}})
8; CHECK-NEXT: }
9
10@array = external dso_local local_unnamed_addr global ptr, align 4
11
12; Function Attrs: nofree norecurse nounwind
13define dso_local void @NumSift(i32 %i, i32 %j) local_unnamed_addr #0 {
14entry:
15  %add36 = shl i32 %i, 1
16  %cmp.not37 = icmp ugt i32 %add36, %j
17  br i1 %cmp.not37, label %while.end, label %while.body.lr.ph
18
19while.body.lr.ph:                                 ; preds = %entry
20  %0 = load ptr, ptr @array, align 4
21  %add16 = add i32 %j, 1
22  br label %while.body
23
24while.body:                                       ; preds = %while.body.lr.ph, %if.end17
25  %add39 = phi i32 [ %add36, %while.body.lr.ph ], [ %add, %if.end17 ]
26  %i.addr.038 = phi i32 [ %i, %while.body.lr.ph ], [ %i.addr.1, %if.end17 ]
27  %cmp2 = icmp ult i32 %add39, %j
28  br i1 %cmp2, label %if.then, label %if.end7
29
30if.then:                                          ; preds = %while.body
31  %arrayidx = getelementptr inbounds i32, ptr %0, i32 %add39
32  %1 = load i32, ptr %arrayidx, align 4
33  %add3 = or i32 %add39, 1
34  %arrayidx4 = getelementptr inbounds i32, ptr %0, i32 %add3
35  %2 = load i32, ptr %arrayidx4, align 4
36  %cmp5 = icmp ult i32 %1, %2
37  %spec.select = select i1 %cmp5, i32 %add3, i32 %add39
38  br label %if.end7
39
40if.end7:                                          ; preds = %if.then, %while.body
41  %k.0 = phi i32 [ %add39, %while.body ], [ %spec.select, %if.then ]
42  %arrayidx8 = getelementptr inbounds i32, ptr %0, i32 %i.addr.038
43  %3 = load i32, ptr %arrayidx8, align 4
44  %arrayidx9 = getelementptr inbounds i32, ptr %0, i32 %k.0
45  %4 = load i32, ptr %arrayidx9, align 4
46  %cmp10 = icmp ult i32 %3, %4
47  br i1 %cmp10, label %if.then11, label %if.end17
48
49if.then11:                                        ; preds = %if.end7
50  store i32 %3, ptr %arrayidx9, align 4
51  store i32 %4, ptr %arrayidx8, align 4
52  br label %if.end17
53
54if.end17:                                         ; preds = %if.end7, %if.then11
55  %i.addr.1 = phi i32 [ %k.0, %if.then11 ], [ %add16, %if.end7 ]
56  %add = shl i32 %i.addr.1, 1
57  %cmp.not = icmp ugt i32 %add, %j
58  br i1 %cmp.not, label %while.end, label %while.body
59
60while.end:                                        ; preds = %if.end17, %entry
61  ret void
62}
63
64attributes #0 = { "target-cpu"="hexagonv65" }
65