xref: /llvm-project/llvm/test/CodeGen/Hexagon/isel-setcc-i1.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -hexagon-initial-cfg-cleanup=0 < %s | FileCheck %s
2
3; Check that this compiles successfully.
4; CHECK: if (p0)
5
6target triple = "hexagon"
7
8define void @fred() #0 {
9b0:
10  br label %b1
11
12b1:                                               ; preds = %b1, %b0
13  %v2 = load i32, ptr undef, align 4
14  %v3 = select i1 undef, i32 %v2, i32 0
15  %v4 = and i32 %v3, 7
16  %v5 = icmp eq i32 %v4, 4
17  %v6 = or i1 undef, %v5
18  %v7 = and i1 undef, %v6
19  %v8 = xor i1 %v7, true
20  %v9 = or i1 undef, %v8
21  br i1 %v9, label %b10, label %b1
22
23b10:                                              ; preds = %b1
24  unreachable
25}
26
27attributes #0 = { nounwind "target-cpu"="hexagonv55" }
28