xref: /llvm-project/llvm/test/CodeGen/Hexagon/intrinsics/atomic_load.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: sed -e "s/ORDER/unordered/" %s | llc -mtriple=hexagon -disable-hexagon-amodeopt=0 | FileCheck %s
2; RUN: sed -e "s/ORDER/monotonic/" %s | llc -mtriple=hexagon -disable-hexagon-amodeopt=0 | FileCheck %s
3; RUN: sed -e "s/ORDER/acquire/" %s | llc -mtriple=hexagon -disable-hexagon-amodeopt=0 | FileCheck %s
4; RUN: sed -e "s/ORDER/seq_cst/" %s | llc -mtriple=hexagon -disable-hexagon-amodeopt=0 | FileCheck %s
5
6%struct.Obj = type { [100 x i32] }
7
8@i8Src   = global i8 0,  align 1
9@i8Dest  = global i8 0,  align 1
10@i16Src  = global i16 0, align 2
11@i16Dest = global i16 0, align 2
12@i32Src  = global i32 0, align 4
13@i32Dest = global i32 0, align 4
14@i64Src  = global i64 0, align 8
15@i64Dest = global i64 0, align 8
16@ptrSrc  = global ptr null, align 4
17@ptrDest = global ptr null, align 4
18
19define void @load_i8() #0 {
20entry:
21  %i8Tmp = load atomic i8, ptr @i8Src ORDER, align 1
22  store i8 %i8Tmp, ptr @i8Dest, align 1
23  ret void
24}
25; CHECK-LABEL: load_i8:
26; CHECK: [[TMP_REG:r[0-9]+]] = memub(gp+#i8Src)
27; CHECK: memb(gp+#i8Dest) = [[TMP_REG]]
28
29define void @load_i16() #0 {
30entry:
31  %i16Tmp = load atomic i16, ptr @i16Src ORDER, align 2
32  store i16 %i16Tmp, ptr @i16Dest, align 2
33  ret void
34}
35; CHECK-LABEL: load_i16:
36; CHECK: [[TMP_REG:r[0-9]+]] = memuh(gp+#i16Src)
37; CHECK: memh(gp+#i16Dest) = [[TMP_REG]]
38
39define void @load_i32() #0 {
40entry:
41  %i32Tmp = load atomic i32, ptr @i32Src ORDER, align 4
42  store i32 %i32Tmp, ptr @i32Dest, align 4
43  ret void
44}
45; CHECK-LABEL: load_i32:
46; CHECK: [[TMP_REG:r[0-9]+]] = memw(gp+#i32Src)
47; CHECK: memw(gp+#i32Dest) = [[TMP_REG]]
48
49define void @load_i64() #0 {
50entry:
51  %i64Tmp = load atomic i64, ptr @i64Src ORDER, align 8
52  store i64 %i64Tmp, ptr @i64Dest, align 8
53  ret void
54}
55; CHECK-LABEL: load_i64:
56; CHECK: [[TMP_REG:r[0-9]+:[0-9]+]] = memd(gp+#i64Src)
57; CHECK: memd(gp+#i64Dest) = [[TMP_REG]]
58
59define void @load_ptr() #0 {
60entry:
61  %ptrTmp = load atomic i32, ptr @ptrSrc ORDER, align 4
62  store i32 %ptrTmp, ptr @ptrDest, align 4
63  ret void
64}
65; CHECK-LABEL: load_ptr:
66; CHECK: [[TMP_REG:r[0-9]+]] = memw(gp+#ptrSrc)
67; CHECK: memw(gp+#ptrDest) = [[TMP_REG]]
68
69