xref: /llvm-project/llvm/test/CodeGen/Hexagon/fltnvjump.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -O2 < %s | FileCheck %s
2; We do not want to see a new value compare after the convert
3; CHECK: r{{[0-9]+}} = convert_df2w
4; CHECK-NOT: if (!cmp.eq(r{{[0-9]+}}.new,r{{[0-9]+}})jump
5; r3 = convert_df2w(r1:0):chop
6; if (!cmp.eq(r3.new, r2)) jump:nt .LBB0_13
7
8target triple = "hexagon"
9
10%s.0 = type { %s.1, ptr, ptr }
11%s.1 = type { i16, i16, i32 }
12%s.2 = type { i8, i32, i32, i16, i16, i16, i32, i8, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, ptr }
13%s.3 = type { [2 x i16], i16, i16, i16, i16, [13 x i16], i16, i16, [2 x ptr], [25 x i16], [49 x i16], [6 x i16], [49 x i16] }
14
15@g0 = internal constant %s.0 { %s.1 { i16 705, i16 0, i32 16 }, ptr @g1, ptr @g2 }, align 4
16@g1 = private unnamed_addr constant [110 x i8] c"Assertion ............................................................................................ failed\00", align 1
17@g2 = private unnamed_addr constant [13 x i8] c"............\00", align 1
18
19define signext i16 @f0(ptr %a0) #0 {
20b0:
21  %v0 = alloca i16, align 2
22  %v1 = alloca i16, align 2
23  %v2 = getelementptr inbounds %s.2, ptr %a0, i32 0, i32 19
24  %v3 = load ptr, ptr %v2, align 4, !tbaa !0
25  %v4 = getelementptr inbounds %s.3, ptr %v3, i32 0, i32 12, i32 0
26  %v5 = getelementptr inbounds %s.3, ptr %v3, i32 0, i32 2
27  %v6 = call signext i16 @f1(ptr %v4, ptr %v5, ptr %a0)
28  %v7 = icmp eq i16 %v6, 0
29  br i1 %v7, label %b1, label %b13
30
31b1:                                               ; preds = %b0
32  %v8 = getelementptr inbounds %s.2, ptr %a0, i32 0, i32 11
33  %v9 = load i16, ptr %v8, align 2, !tbaa !4
34  %v10 = sext i16 %v9 to i32
35  %v11 = load i16, ptr %v5, align 2, !tbaa !4
36  %v12 = sext i16 %v11 to i32
37  %v13 = call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v10, i32 %v12)
38  %v14 = trunc i32 %v13 to i16
39  %v15 = icmp sgt i16 %v14, 0
40  br i1 %v15, label %b13, label %b2
41
42b2:                                               ; preds = %b1
43  %v16 = getelementptr inbounds %s.3, ptr %v3, i32 0, i32 8, i32 1
44  %v17 = load ptr, ptr %v16, align 4, !tbaa !0
45  call void @f2(ptr %v17, ptr %v1, ptr %v4, i16 signext %v11, i16 signext %v9)
46  %v18 = getelementptr inbounds %s.3, ptr %v3, i32 0, i32 8, i32 0
47  %v19 = load ptr, ptr %v18, align 4, !tbaa !0
48  %v20 = load ptr, ptr %v16, align 4, !tbaa !0
49  %v21 = load i16, ptr %v1, align 2, !tbaa !4
50  call void @f3(ptr %v19, ptr %v0, ptr %v20, i16 signext %v21)
51  %v22 = load i16, ptr %v0, align 2, !tbaa !4
52  store i16 %v22, ptr %v3, align 2, !tbaa !4
53  %v24 = load i16, ptr %v1, align 2, !tbaa !4
54  %v25 = getelementptr inbounds %s.3, ptr %v3, i32 0, i32 0, i32 1
55  store i16 %v24, ptr %v25, align 2, !tbaa !4
56  %v26 = load i16, ptr %v0, align 2, !tbaa !4
57  %v27 = sext i16 %v26 to i32
58  %v28 = icmp slt i16 %v26, 1
59  br i1 %v28, label %b13, label %b3
60
61b3:                                               ; preds = %b2
62  %v29 = call i32 @llvm.hexagon.S2.asr.r.r.sat(i32 48, i32 1)
63  %v30 = call i32 @llvm.hexagon.A2.sath(i32 %v29)
64  %v31 = shl i32 %v30, 16
65  %v32 = ashr exact i32 %v31, 16
66  %v33 = call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v27, i32 %v32)
67  %v34 = trunc i32 %v33 to i16
68  %v35 = icmp sgt i16 %v34, 0
69  br i1 %v35, label %b13, label %b4
70
71b4:                                               ; preds = %b3
72  %v36 = load ptr, ptr %v18, align 4, !tbaa !0
73  %v37 = load i16, ptr %v36, align 2, !tbaa !4
74  %v38 = getelementptr inbounds i16, ptr %v36, i32 %v27
75  %v39 = load i16, ptr %v38, align 2, !tbaa !4
76  %v40 = sext i16 %v37 to i32
77  %v41 = call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v40, i32 32)
78  %v42 = trunc i32 %v41 to i16
79  %v43 = icmp sgt i16 %v42, 0
80  br i1 %v43, label %b13, label %b5
81
82b5:                                               ; preds = %b4
83  %v44 = sext i16 %v39 to i32
84  %v45 = call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v40, i32 %v44)
85  %v46 = and i32 %v45, 32768
86  %v47 = icmp eq i32 %v46, 0
87  br i1 %v47, label %b13, label %b6
88
89b6:                                               ; preds = %b5
90  %v48 = load i16, ptr %v1, align 2, !tbaa !4
91  %v49 = sext i16 %v48 to i32
92  %v50 = load ptr, ptr %v16, align 4, !tbaa !0
93  %v51 = getelementptr inbounds i16, ptr %v50, i32 %v49
94  %v52 = load i16, ptr %v51, align 2, !tbaa !4
95  %v53 = getelementptr inbounds %s.2, ptr %a0, i32 0, i32 14
96  %v54 = load i16, ptr %v53, align 2, !tbaa !4
97  %v55 = icmp eq i16 %v54, 0
98  br i1 %v55, label %b7, label %b8
99
100b7:                                               ; preds = %b6
101  %v56 = getelementptr inbounds %s.3, ptr %v3, i32 0, i32 1
102  store i16 1, ptr %v56, align 2, !tbaa !4
103  br label %b11
104
105b8:                                               ; preds = %b6
106  %v57 = load i16, ptr %v50, align 2, !tbaa !4
107  %v58 = sext i16 %v57 to i32
108  %v59 = sext i16 %v52 to i32
109  %v60 = call signext i16 @f4(i32 %v58, i32 %v59)
110  %v61 = sext i16 %v60 to i32
111  %v62 = call i32 @llvm.hexagon.S2.asr.r.r.sat(i32 %v61, i32 2)
112  %v63 = call i32 @llvm.hexagon.A2.sath(i32 %v62)
113  %v64 = shl i32 %v63, 16
114  %v65 = ashr exact i32 %v64, 16
115  %v66 = load i16, ptr %v53, align 2, !tbaa !4
116  %v67 = sext i16 %v66 to i32
117  %v68 = call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 1024, i32 %v65, i32 %v67)
118  %v69 = shl i32 %v68, 16
119  %v70 = ashr exact i32 %v69, 16
120  %v71 = call i32 @llvm.hexagon.S2.asr.r.r.sat(i32 %v70, i32 1)
121  %v72 = call i32 @llvm.hexagon.A2.sath(i32 %v71)
122  %v73 = shl i32 %v72, 16
123  %v74 = ashr exact i32 %v73, 16
124  %v75 = call i32 @llvm.hexagon.S2.asr.r.r.sat(i32 %v74, i32 10)
125  %v76 = call i32 @llvm.hexagon.A2.sath(i32 %v75)
126  %v77 = shl i32 %v76, 16
127  %v78 = ashr exact i32 %v77, 16
128  %v79 = sitofp i16 %v66 to float
129  %v80 = sitofp i16 %v52 to float
130  %v81 = sitofp i16 %v57 to float
131  %v82 = fdiv float %v80, %v81
132  %v83 = call float @f7(float %v82, i32 0)
133  %v84 = fmul float %v79, %v83
134  %v85 = fdiv float %v84, 0x3FE62E4300000000
135  %v86 = fpext float %v85 to double
136  %v87 = fadd double %v86, 5.000000e-01
137  %v88 = fptosi double %v87 to i32
138  %v89 = icmp eq i32 %v78, %v88
139  br i1 %v89, label %b10, label %b9
140
141b9:                                               ; preds = %b8
142  call void @f5(ptr @g0) #2
143  unreachable
144
145b10:                                              ; preds = %b8
146  %v90 = trunc i32 %v76 to i16
147  %v91 = icmp eq i32 %v78, 0
148  %v92 = select i1 %v91, i16 1, i16 %v90
149  %v93 = getelementptr inbounds %s.3, ptr %v3, i32 0, i32 1
150  store i16 %v92, ptr %v93, align 2, !tbaa !4
151  br label %b11
152
153b11:                                              ; preds = %b10, %b7
154  %v94 = phi i16 [ %v92, %b10 ], [ 1, %b7 ]
155  %v95 = getelementptr inbounds %s.3, ptr %v3, i32 0, i32 7
156  store i16 %v94, ptr %v95, align 2, !tbaa !4
157  %v96 = sext i16 %v94 to i32
158  %v97 = call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v96, i32 5)
159  %v98 = trunc i32 %v97 to i16
160  %v99 = icmp sgt i16 %v98, 0
161  br i1 %v99, label %b13, label %b12
162
163b12:                                              ; preds = %b11
164  %v100 = getelementptr inbounds %s.3, ptr %v3, i32 0, i32 11, i32 0
165  %v101 = load ptr, ptr %v18, align 4, !tbaa !0
166  %v102 = load i16, ptr %v0, align 2, !tbaa !4
167  call void @f6(ptr %v100, i16 signext %v94, ptr %v101, i16 signext %v102)
168  %v103 = getelementptr inbounds %s.3, ptr %v3, i32 0, i32 3
169  store i16 %v37, ptr %v103, align 2, !tbaa !4
170  %v104 = getelementptr inbounds %s.3, ptr %v3, i32 0, i32 4
171  store i16 %v39, ptr %v104, align 2, !tbaa !4
172  br label %b13
173
174b13:                                              ; preds = %b12, %b11, %b5, %b4, %b3, %b2, %b1, %b0
175  %v105 = phi i16 [ 0, %b12 ], [ -1, %b1 ], [ -1, %b0 ], [ -1, %b3 ], [ -1, %b2 ], [ -1, %b5 ], [ -1, %b4 ], [ -1, %b11 ]
176  ret i16 %v105
177}
178
179declare signext i16 @f1(ptr, ptr, ptr) #0
180
181; Function Attrs: nounwind readnone
182declare i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32, i32) #1
183
184declare void @f2(ptr, ptr, ptr, i16 signext, i16 signext) #0
185
186declare void @f3(ptr, ptr, ptr, i16 signext) #0
187
188; Function Attrs: nounwind readnone
189declare i32 @llvm.hexagon.A2.sath(i32) #1
190
191; Function Attrs: nounwind readnone
192declare i32 @llvm.hexagon.S2.asr.r.r.sat(i32, i32) #1
193
194declare signext i16 @f4(i32, i32) #0
195
196; Function Attrs: nounwind readnone
197declare i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32, i32, i32) #1
198
199; Function Attrs: noreturn
200declare void @f5(ptr) #2
201
202declare void @f6(ptr, i16 signext, ptr, i16 signext) #0
203
204declare float @f7(float, i32) #0
205
206attributes #0 = { nounwind "target-cpu"="hexagonv55" }
207attributes #1 = { nounwind readnone }
208attributes #2 = { noreturn }
209
210!0 = !{!1, !1, i64 0}
211!1 = !{!"any pointer", !2}
212!2 = !{!"omnipotent char", !3}
213!3 = !{!"Simple C/C++ TBAA"}
214!4 = !{!5, !5, i64 0}
215!5 = !{!"short", !2}
216