xref: /llvm-project/llvm/test/CodeGen/Hexagon/fadd.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
2; Check that we generate sp floating point add in V5.
3
4; CHECK: r{{[0-9]+}} = sfadd(r{{[0-9]+}},r{{[0-9]+}})
5
6define i32 @main() nounwind {
7entry:
8  %a = alloca float, align 4
9  %b = alloca float, align 4
10  %c = alloca float, align 4
11  store volatile float 0x402ECCCCC0000000, ptr %a, align 4
12  store volatile float 0x4022333340000000, ptr %b, align 4
13  %0 = load volatile float, ptr %a, align 4
14  %1 = load volatile float, ptr %b, align 4
15  %add = fadd float %0, %1
16  store float %add, ptr %c, align 4
17  ret i32 0
18}
19