xref: /llvm-project/llvm/test/CodeGen/Hexagon/entryBB-isLoopHdr.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956) 
1; RUN: llc -mtriple=hexagon -hexagon-hwloop-preheader < %s | FileCheck %s
2
3; check for lack of assertion failures.
4
5; CHECK: %bb.0
6
7; Function Attrs: nounwind readnone
8declare i32 @llvm.hexagon.A2.sath(i32) #0
9
10; Function Attrs: nounwind readnone
11declare i32 @llvm.hexagon.A2.neg(i32) #0
12
13define void @f0(i16 signext %a0) {
14b0:
15  %v0 = icmp slt i16 %a0, 1
16  br i1 %v0, label %b1, label %b3
17
18b1:                                               ; preds = %b2, %b0
19  %v1 = phi i16 [ %v11, %b2 ], [ %a0, %b0 ]
20  %v2 = sext i16 %v1 to i32
21  %v3 = tail call i32 @llvm.hexagon.A2.neg(i32 %v2)
22  %v4 = tail call i32 @llvm.hexagon.A2.sath(i32 %v3)
23  %v5 = trunc i32 %v4 to i16
24  %v6 = shl i32 %v4, 16
25  %v7 = ashr exact i32 %v6, 16
26  %v8 = icmp slt i16 %v5, 0
27  br i1 %v8, label %b2, label %b3
28
29b2:                                               ; preds = %b1
30  %v9 = tail call i32 @llvm.hexagon.A2.neg(i32 %v7)
31  %v10 = tail call i32 @llvm.hexagon.A2.sath(i32 %v9)
32  %v11 = trunc i32 %v10 to i16
33  %v12 = icmp slt i16 %v11, 1
34  br i1 %v12, label %b1, label %b3
35
36b3:                                               ; preds = %b2, %b1, %b0
37  ret void
38}
39
40attributes #0 = { nounwind readnone }
41