xref: /llvm-project/llvm/test/CodeGen/Hexagon/dhry_proc8.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956) 
1; RUN: llc -mtriple=hexagon -O3 < %s | FileCheck %s
2
3
4; Test that we generate no more than 7 packets in f0.
5;
6; CHECK: f0:
7; CHECK: {
8; CHECK: {
9; CHECK: {
10; CHECK: {
11; CHECK: {
12; CHECK: {
13; CHECK: {
14; CHECK-NOT: {
15
16@g0 = external global i32
17
18; Function Attrs: nounwind
19define i32 @f0(ptr nocapture %a0, ptr nocapture %a1, i32 %a2, i32 %a3) #0 {
20b0:
21  %v0 = add nsw i32 %a2, 5
22  %v1 = getelementptr inbounds i32, ptr %a0, i32 %v0
23  store i32 %a3, ptr %v1, align 4, !tbaa !0
24  %v2 = add nsw i32 %a2, 6
25  %v3 = getelementptr inbounds i32, ptr %a0, i32 %v2
26  store i32 %a3, ptr %v3, align 4, !tbaa !0
27  %v4 = add nsw i32 %a2, 35
28  %v5 = getelementptr inbounds i32, ptr %a0, i32 %v4
29  store i32 %v0, ptr %v5, align 4, !tbaa !0
30  %v6 = getelementptr inbounds [50 x i32], ptr %a1, i32 %v0, i32 %v0
31  store i32 %v0, ptr %v6, align 4, !tbaa !0
32  %v7 = add nsw i32 %a2, 6
33  %v8 = getelementptr inbounds [50 x i32], ptr %a1, i32 %v0, i32 %v7
34  store i32 %v0, ptr %v8, align 4, !tbaa !0
35  %v9 = add nsw i32 %a2, 4
36  %v10 = getelementptr inbounds [50 x i32], ptr %a1, i32 %v0, i32 %v9
37  %v11 = load i32, ptr %v10, align 4, !tbaa !0
38  %v12 = add nsw i32 %v11, 1
39  store i32 %v12, ptr %v10, align 4, !tbaa !0
40  %v13 = load i32, ptr %v1, align 4, !tbaa !0
41  %v14 = add nsw i32 %a2, 25
42  %v15 = getelementptr inbounds [50 x i32], ptr %a1, i32 %v14, i32 %v0
43  store i32 %v13, ptr %v15, align 4, !tbaa !0
44  store i32 5, ptr @g0, align 4, !tbaa !0
45  ret i32 undef
46}
47
48attributes #0 = { nounwind "target-cpu"="hexagonv60" }
49
50!0 = !{!1, !1, i64 0}
51!1 = !{!"int", !2}
52!2 = !{!"omnipotent char", !3}
53!3 = !{!"Simple C/C++ TBAA"}
54