1; RUN: llc -mtriple=hexagon -relocation-model=pic -mattr=+long-calls < %s | FileCheck --check-prefix=CHECK-LONG %s 2; RUN: llc -mtriple=hexagon -relocation-model=pic < %s | FileCheck %s 3 4; CHECK-LONG: call ##g0@GDPLT 5; CHECK-LONG-NOT: call g0@GDPLT 6; CHECK: call g0@GDPLT 7; CHECK-NOT: call ##g0@GDPLT 8 9target triple = "hexagon--linux" 10 11@g0 = internal thread_local global i32 0, align 4 12 13; Function Attrs: norecurse nounwind 14define void @f0(i32 %a0) local_unnamed_addr #0 { 15b0: 16 store volatile i32 1, ptr @g0, align 4, !tbaa !1 17 ret void 18} 19 20; Function Attrs: norecurse nounwind 21define zeroext i1 @f1() local_unnamed_addr #0 { 22b0: 23 %v0 = load volatile i32, ptr @g0, align 4, !tbaa !1 24 %v1 = icmp eq i32 %v0, 0 25 br i1 %v1, label %b2, label %b1 26 27b1: ; preds = %b0 28 store volatile i32 0, ptr @g0, align 4, !tbaa !1 29 br label %b2 30 31b2: ; preds = %b1, %b0 32 %v2 = phi i1 [ true, %b1 ], [ false, %b0 ] 33 ret i1 %v2 34} 35 36attributes #0 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } 37 38!llvm.module.flags = !{!0} 39 40!0 = !{i32 7, !"PIC Level", i32 1} 41!1 = !{!2, !2, i64 0} 42!2 = !{!"int", !3, i64 0} 43!3 = !{!"omnipotent char", !4, i64 0} 44!4 = !{!"Simple C++ TBAA"} 45