1; RUN: llc -mtriple=hexagon < %s | FileCheck %s 2; CHECK-NOT: .sdata.4.g0,"aM" 3 4target triple = "hexagon-unknown--elf" 5 6%s.0 = type { i32 } 7 8@g0 = global %s.0 { i32 3 }, align 4 #0 9@g1 = global i32 0, align 4 #1 10@g2 = global ptr @g0, align 4 #2 11@g3 = global i32 0, align 4 #3 12@g4 = global i32 0, align 4 #4 13 14; Function Attrs: nounwind optsize 15define i32 @f0() #5 section ".text.main" { 16b0: 17 %v0 = load i32, ptr @g3, align 4, !tbaa !4 18 %v1 = add nsw i32 %v0, 1 19 store i32 %v1, ptr @g3, align 4, !tbaa !4 20 %v2 = load ptr, ptr @g2, align 4, !tbaa !8 21 %v3 = load i32, ptr @g1, align 4, !tbaa !10 22 %v4 = getelementptr inbounds i8, ptr %v2, i32 %v3 23 %v6 = load i32, ptr %v4, align 4, !tbaa !4 24 store i32 %v6, ptr @g4, align 4, !tbaa !4 25 store i32 1, ptr @g3, align 4, !tbaa !4 26 ret i32 0 27} 28 29attributes #0 = { "linker_input_section"=".sdata.4.cccc" "linker_output_section"=".sdata.4" } 30attributes #1 = { "linker_input_section"=".sbss.4.np" "linker_output_section"=".sbss.4" } 31attributes #2 = { "linker_input_section"=".sdata.4.cp" "linker_output_section"=".sdata.4" } 32attributes #3 = { "linker_input_section"=".sbss.4.counter" "linker_output_section"=".sbss.4" } 33attributes #4 = { "linker_input_section"=".sbss.4.value" "linker_output_section"=".sbss.4" } 34attributes #5 = { nounwind optsize "target-cpu"="hexagonv55" } 35 36!llvm.module.flags = !{!0, !2} 37 38!0 = !{i32 6, !"Target CPU", !1} 39!1 = !{!"hexagonv55"} 40!2 = !{i32 6, !"Target Features", !3} 41!3 = !{!"-hvx"} 42!4 = !{!5, !5, i64 0} 43!5 = !{!"int", !6, i64 0} 44!6 = !{!"omnipotent char", !7, i64 0} 45!7 = !{!"Simple C/C++ TBAA"} 46!8 = !{!9, !9, i64 0} 47!9 = !{!"any pointer", !6, i64 0} 48!10 = !{!6, !6, i64 0} 49