xref: /llvm-project/llvm/test/CodeGen/Hexagon/assert-postinc-ptr-not-value.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956) 
1; RUN: llc -mtriple=hexagon < %s | FileCheck %s
2; CHECK: f1
3
4target triple = "hexagon"
5
6%s.0 = type { i32 }
7
8@g0 = internal unnamed_addr global ptr null, section ".data.............", align 4
9@g1 = internal global i32 0, section ".data.............", align 4
10
11; Function Attrs: nounwind
12define ptr @f0(ptr %a0) #0 {
13b0:
14  %v0 = getelementptr inbounds i32, ptr %a0, i32 -1
15  %v1 = load i32, ptr %v0, align 4
16  %v2 = and i32 %v1, -3
17  store i32 %v2, ptr %v0, align 4
18  %v3 = getelementptr inbounds i32, ptr %a0, i32 -2
19  %v4 = load i32, ptr %v3, align 4
20  %v5 = lshr i32 %v4, 2
21  %v6 = xor i32 %v5, -1
22  %v7 = getelementptr inbounds i32, ptr %a0, i32 %v6
23  %v8 = lshr i32 %v1, 2
24  %v9 = add i32 %v8, -1
25  %v10 = getelementptr inbounds i32, ptr %a0, i32 %v9
26  %v11 = load i32, ptr %v10, align 4
27  %v12 = lshr i32 %v11, 2
28  %v13 = icmp eq i32 %v12, 0
29  br i1 %v13, label %b3, label %b1
30
31b1:                                               ; preds = %b0
32  %v14 = add i32 %v12, %v9
33  %v15 = getelementptr inbounds i32, ptr %a0, i32 %v14
34  %v16 = load i32, ptr %v15, align 4
35  %v17 = and i32 %v16, 1
36  %v18 = icmp eq i32 %v17, 0
37  br i1 %v18, label %b3, label %b2
38
39b2:                                               ; preds = %b1
40  %v19 = add nsw i32 %v12, %v8
41  %v20 = shl i32 %v19, 2
42  %v21 = and i32 %v1, 1
43  %v22 = or i32 %v20, %v21
44  store i32 %v22, ptr %v0, align 4
45  br label %b3
46
47b3:                                               ; preds = %b2, %b1, %b0
48  %v23 = phi i32 [ %v2, %b1 ], [ %v2, %b0 ], [ %v22, %b2 ]
49  %v24 = and i32 %v23, 1
50  %v25 = icmp eq i32 %v24, 0
51  br i1 %v25, label %b5, label %b4
52
53b4:                                               ; preds = %b3
54  %v26 = load i32, ptr %v7, align 4
55  %v27 = and i32 %v26, -4
56  %v28 = add i32 %v27, %v23
57  %v29 = and i32 %v28, -4
58  %v30 = and i32 %v26, 3
59  %v31 = or i32 %v29, %v30
60  store i32 %v31, ptr %v7, align 4
61  br label %b5
62
63b5:                                               ; preds = %b4, %b3
64  %v32 = phi i32 [ %v31, %b4 ], [ %v23, %b3 ]
65  %v33 = phi ptr [ %v7, %b4 ], [ %v0, %b3 ]
66  %v35 = lshr i32 %v32, 2
67  %v36 = add i32 %v35, -1
68  %v37 = getelementptr inbounds %s.0, ptr %v33, i32 %v36, i32 0
69  %v38 = load i32, ptr %v37, align 4
70  %v39 = shl nuw i32 %v35, 2
71  %v40 = and i32 %v38, 3
72  %v41 = or i32 %v40, %v39
73  store i32 %v41, ptr %v37, align 4
74  %v42 = load i32, ptr %v33, align 4
75  %v43 = lshr i32 %v42, 2
76  %v44 = getelementptr inbounds %s.0, ptr %v33, i32 %v43, i32 0
77  %v45 = load i32, ptr %v44, align 4
78  %v46 = or i32 %v45, 1
79  store i32 %v46, ptr %v44, align 4
80  ret ptr %v33
81}
82
83; Function Attrs: nounwind
84define i64 @f1(i32 %a0) #0 {
85b0:
86  %v0 = load ptr, ptr @g0, align 4, !tbaa !0
87  %v1 = getelementptr inbounds %s.0, ptr %v0, i32 7
88  tail call void @f2(ptr @g1) #0
89  br label %b1
90
91b1:                                               ; preds = %b5, %b0
92  %v2 = phi ptr [ %v1, %b0 ], [ %v20, %b5 ]
93  %v4 = load i32, ptr %v2, align 4
94  %v5 = and i32 %v4, 2
95  %v6 = icmp eq i32 %v5, 0
96  br i1 %v6, label %b3, label %b2
97
98b2:                                               ; preds = %b1
99  tail call fastcc void @f8()
100  %v7 = getelementptr inbounds %s.0, ptr %v2, i32 1, i32 0
101  %v8 = tail call ptr @f0(ptr %v7)
102  tail call fastcc void @f7()
103  br label %b3
104
105b3:                                               ; preds = %b2, %b1
106  %v9 = phi ptr [ %v8, %b2 ], [ %v2, %b1 ]
107  %v11 = load i32, ptr %v9, align 4
108  %v12 = lshr i32 %v11, 2
109  %v13 = getelementptr inbounds %s.0, ptr %v9, i32 %v12, i32 0
110  %v14 = load i32, ptr %v13, align 4
111  %v15 = and i32 %v14, 1
112  %v16 = icmp eq i32 %v15, 0
113  br i1 %v16, label %b5, label %b4
114
115b4:                                               ; preds = %b3
116  %v17 = mul i32 %v12, 4
117  %v18 = add i32 %v17, -4
118  %v19 = icmp ult i32 %v18, %a0
119  br i1 %v19, label %b5, label %b7
120
121b5:                                               ; preds = %b4, %b3
122  %v20 = getelementptr inbounds %s.0, ptr %v9, i32 %v12
123  %v21 = icmp ult i32 %v14, 4
124  br i1 %v21, label %b6, label %b1
125
126b6:                                               ; preds = %b5
127  tail call fastcc void @f3()
128  br label %b11
129
130b7:                                               ; preds = %b4
131  %v22 = add i32 %a0, 4
132  %v23 = lshr i32 %v22, 2
133  %v24 = add i32 %v23, 8
134  %v25 = lshr i32 %v24, 3
135  %v26 = mul nsw i32 %v25, 8
136  %v27 = sub nsw i32 %v12, %v26
137  %v28 = icmp sgt i32 %v27, 7
138  br i1 %v28, label %b8, label %b9
139
140b8:                                               ; preds = %b7
141  %v29 = getelementptr inbounds %s.0, ptr %v9, i32 %v26, i32 0
142  %v30 = shl i32 %v27, 2
143  store i32 %v30, ptr %v29, align 4
144  %v31 = load i32, ptr %v9, align 4
145  %v32 = lshr i32 %v31, 2
146  %v33 = add i32 %v32, -1
147  %v34 = getelementptr inbounds %s.0, ptr %v9, i32 %v33, i32 0
148  %v35 = load i32, ptr %v34, align 4
149  %v36 = and i32 %v35, 3
150  %v37 = or i32 %v36, %v30
151  store i32 %v37, ptr %v34, align 4
152  %v38 = load i32, ptr %v9, align 4
153  %v39 = mul i32 %v25, 32
154  %v40 = and i32 %v38, 3
155  %v41 = or i32 %v40, %v39
156  store i32 %v41, ptr %v9, align 4
157  br label %b10
158
159b9:                                               ; preds = %b7
160  %v42 = and i32 %v14, -2
161  store i32 %v42, ptr %v13, align 4
162  br label %b10
163
164b10:                                              ; preds = %b9, %b8
165  tail call fastcc void @f3()
166  %v43 = getelementptr inbounds %s.0, ptr %v9, i32 1
167  %v44 = load i32, ptr %v9, align 4
168  %v45 = lshr i32 %v44, 2
169  %v46 = mul i32 %v45, 4
170  %v47 = add i32 %v46, -4
171  %v48 = ptrtoint ptr %v43 to i32
172  %v49 = zext i32 %v47 to i64
173  %v50 = shl nuw i64 %v49, 32
174  %v51 = zext i32 %v48 to i64
175  br label %b11
176
177b11:                                              ; preds = %b10, %b6
178  %v52 = phi i64 [ 0, %b6 ], [ %v51, %b10 ]
179  %v53 = phi i64 [ 0, %b6 ], [ %v50, %b10 ]
180  %v54 = or i64 %v53, %v52
181  ret i64 %v54
182}
183
184declare void @f2(ptr) #0
185
186; Function Attrs: inlinehint nounwind
187define internal fastcc void @f3() #1 {
188b0:
189  store i32 0, ptr @g1, align 4, !tbaa !4
190  ret void
191}
192
193; Function Attrs: nounwind
194define void @f4(ptr nocapture %a0) #0 {
195b0:
196  %v0 = getelementptr inbounds i32, ptr %a0, i32 -1
197  tail call void @f2(ptr @g1) #0
198  %v1 = load i32, ptr %v0, align 4
199  %v2 = or i32 %v1, 2
200  store i32 %v2, ptr %v0, align 4
201  tail call fastcc void @f3()
202  ret void
203}
204
205; Function Attrs: nounwind
206define ptr @f5(ptr %a0) #0 {
207b0:
208  tail call void @f2(ptr @g1) #0
209  %v0 = tail call ptr @f0(ptr %a0)
210  tail call fastcc void @f3()
211  ret ptr %v0
212}
213
214; Function Attrs: nounwind
215define void @f6(ptr %a0, i32 %a1) #0 {
216b0:
217  %v0 = getelementptr inbounds %s.0, ptr %a0, i32 7, i32 0
218  %v1 = mul i32 %a1, 4
219  %v2 = add i32 %v1, -32
220  store i32 %v2, ptr %v0, align 4
221  %v3 = add i32 %a1, -1
222  %v4 = getelementptr inbounds %s.0, ptr %a0, i32 %v3, i32 0
223  store i32 1, ptr %v4, align 4
224  store i32 0, ptr @g1, align 4, !tbaa !4
225  store ptr %a0, ptr @g0, align 4
226  ret void
227}
228
229; Function Attrs: inlinehint nounwind
230define internal fastcc void @f7() #1 {
231b0:
232  tail call void asm sideeffect " nop", "~{memory}"() #0, !srcloc !6
233  ret void
234}
235
236; Function Attrs: inlinehint nounwind
237define internal fastcc void @f8() #1 {
238b0:
239  tail call void asm sideeffect " nop", "~{memory}"() #0, !srcloc !7
240  ret void
241}
242
243attributes #0 = { nounwind }
244attributes #1 = { inlinehint nounwind }
245
246!0 = !{!1, !1, i64 0}
247!1 = !{!"any pointer", !2}
248!2 = !{!"omnipotent char", !3}
249!3 = !{!"Simple C/C++ TBAA"}
250!4 = !{!5, !5, i64 0}
251!5 = !{!"int", !2}
252!6 = !{i32 782713}
253!7 = !{i32 782625}
254