xref: /llvm-project/llvm/test/CodeGen/Hexagon/addr-mode-opt.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; Broken by r326208
2; XFAIL: *
3; RUN: llc -mtriple=hexagon -O3 < %s | FileCheck %s
4; CHECK-NOT: add(r{{[0-9]+}},#2)
5; CHECK-NOT: add(r{{[0-9]+}},#3)
6; CHECK: memub(r{{[0-9]+}}+#2)
7; CHECK: memub(r{{[0-9]+}}+#3)
8
9@g0 = external global i32, align 4
10
11define i32 @f0(ptr nocapture readonly %a0, ptr nocapture readonly %a1) {
12b0:
13  %v0 = getelementptr inbounds i8, ptr %a0, i32 2
14  %v1 = getelementptr inbounds i8, ptr %a1, i32 3
15  br label %b2
16
17b1:                                               ; preds = %b3
18  %v2 = getelementptr inbounds i8, ptr %a0, i32 %v7
19  %v3 = add nuw nsw i32 %v7, 1
20  %v4 = getelementptr inbounds i8, ptr %a1, i32 %v3
21  %v5 = icmp eq i32 %v7, 3
22  br i1 %v5, label %b4, label %b2
23
24b2:                                               ; preds = %b1, %b0
25  %v6 = phi ptr [ %v1, %b0 ], [ %v4, %b1 ]
26  %v7 = phi i32 [ 3, %b0 ], [ %v3, %b1 ]
27  %v8 = phi ptr [ %v0, %b0 ], [ %v2, %b1 ]
28  br label %b3
29
30b3:                                               ; preds = %b3, %b2
31  %v9 = load i8, ptr %v8, align 1
32  %v10 = zext i8 %v9 to i32
33  %v11 = load i8, ptr %v6, align 1
34  %v12 = zext i8 %v11 to i32
35  %v13 = tail call i32 @f1(i32 %v10, i32 %v12)
36  %v14 = icmp eq i32 %v13, 0
37  br i1 %v14, label %b1, label %b3
38
39b4:                                               ; preds = %b1
40  %v15 = tail call i32 @f2(ptr %a0, ptr %a1)
41  %v16 = icmp sgt i32 %v15, 0
42  br i1 %v16, label %b5, label %b6
43
44b5:                                               ; preds = %b4
45  store i32 10, ptr @g0, align 4
46  br label %b6
47
48b6:                                               ; preds = %b5, %b4
49  %v17 = phi i32 [ 1, %b5 ], [ 0, %b4 ]
50  ret i32 %v17
51}
52
53declare i32 @f1(...)
54
55declare i32 @f2(ptr nocapture, ptr nocapture)
56