xref: /llvm-project/llvm/test/CodeGen/DirectX/log-vec.ll (revision 381156c130553179fe3499403cf530deb73f1a3f)
1; RUN: opt -S  -dxil-intrinsic-expansion  < %s | FileCheck %s
2
3; Make sure dxil operation function calls for log are generated for float and half.
4
5; CHECK-LABEL: log_float4
6; CHECK: call <4 x float> @llvm.log2.v4f32(<4 x float>  %{{.*}})
7; CHECK: fmul <4 x float> splat (float 0x3FE62E4300000000),  %{{.*}}
8define noundef <4 x float> @log_float4(<4 x float> noundef %p0) {
9entry:
10  %p0.addr = alloca <4 x float>, align 16
11  store <4 x float> %p0, ptr %p0.addr, align 16
12  %0 = load <4 x float>, ptr %p0.addr, align 16
13  %elt.log = call <4 x float> @llvm.log.v4f32(<4 x float> %0)
14  ret <4 x float> %elt.log
15}
16
17; CHECK-LABEL: log10_float4
18; CHECK: call <4 x float> @llvm.log2.v4f32(<4 x float>  %{{.*}})
19; CHECK: fmul <4 x float> splat (float 0x3FD3441340000000),  %{{.*}}
20define noundef <4 x float> @log10_float4(<4 x float> noundef %p0) {
21entry:
22  %p0.addr = alloca <4 x float>, align 16
23  store <4 x float> %p0, ptr %p0.addr, align 16
24  %0 = load <4 x float>, ptr %p0.addr, align 16
25  %elt.log10 = call <4 x float> @llvm.log10.v4f32(<4 x float> %0)
26  ret <4 x float> %elt.log10
27}
28
29declare <4 x float> @llvm.log.v4f32(<4 x float>)
30declare <4 x float> @llvm.log10.v4f32(<4 x float>)
31