xref: /llvm-project/llvm/test/CodeGen/DirectX/imad.ll (revision 011b618644113996e2c0a8e57db40f89d20878e3)
1; RUN: opt -S -dxil-op-lower < %s | FileCheck %s
2
3; Make sure dxil operation function calls for round are generated for float and half.
4; CHECK:call i16 @dx.op.tertiary.i16(i32 48, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR:]]
5; CHECK:call i32 @dx.op.tertiary.i32(i32 48, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]]
6; CHECK:call i64 @dx.op.tertiary.i64(i32 48, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]]
7
8; CHECK: attributes #[[#ATTR]] = {{{.*}} memory(none) {{.*}}}
9
10target datalayout = "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:32-f64:64-n8:16:32:64"
11target triple = "dxil-pc-shadermodel6.7-library"
12; Function Attrs: noinline nounwind optnone
13define noundef i16 @imad_short(i16 noundef %p0, i16 noundef %p1, i16 noundef %p2) #0 {
14entry:
15  %p2.addr = alloca i16, align 2
16  %p1.addr = alloca i16, align 2
17  %p0.addr = alloca i16, align 2
18  store i16 %p2, ptr %p2.addr, align 2
19  store i16 %p1, ptr %p1.addr, align 2
20  store i16 %p0, ptr %p0.addr, align 2
21  %0 = load i16, ptr %p0.addr, align 2
22  %1 = load i16, ptr %p1.addr, align 2
23  %2 = load i16, ptr %p2.addr, align 2
24  %dx.imad = call i16 @llvm.dx.imad.i16(i16 %0, i16 %1, i16 %2)
25  ret i16 %dx.imad
26}
27
28; Function Attrs: nocallback nofree nosync nounwind willreturn
29declare i16 @llvm.dx.imad.i16(i16, i16, i16) #1
30
31; Function Attrs: noinline nounwind optnone
32define noundef i32 @imad_int(i32 noundef %p0, i32 noundef %p1, i32 noundef %p2) #0 {
33entry:
34  %p2.addr = alloca i32, align 4
35  %p1.addr = alloca i32, align 4
36  %p0.addr = alloca i32, align 4
37  store i32 %p2, ptr %p2.addr, align 4
38  store i32 %p1, ptr %p1.addr, align 4
39  store i32 %p0, ptr %p0.addr, align 4
40  %0 = load i32, ptr %p0.addr, align 4
41  %1 = load i32, ptr %p1.addr, align 4
42  %2 = load i32, ptr %p2.addr, align 4
43  %dx.imad = call i32 @llvm.dx.imad.i32(i32 %0, i32 %1, i32 %2)
44  ret i32 %dx.imad
45}
46
47; Function Attrs: nocallback nofree nosync nounwind willreturn
48declare i32 @llvm.dx.imad.i32(i32, i32, i32) #1
49
50; Function Attrs: noinline nounwind optnone
51define noundef i64 @imad_int64(i64 noundef %p0, i64 noundef %p1, i64 noundef %p2) #0 {
52entry:
53  %p2.addr = alloca i64, align 8
54  %p1.addr = alloca i64, align 8
55  %p0.addr = alloca i64, align 8
56  store i64 %p2, ptr %p2.addr, align 8
57  store i64 %p1, ptr %p1.addr, align 8
58  store i64 %p0, ptr %p0.addr, align 8
59  %0 = load i64, ptr %p0.addr, align 8
60  %1 = load i64, ptr %p1.addr, align 8
61  %2 = load i64, ptr %p2.addr, align 8
62  %dx.imad = call i64 @llvm.dx.imad.i64(i64 %0, i64 %1, i64 %2)
63  ret i64 %dx.imad
64}
65
66; Function Attrs: nocallback nofree nosync nounwind willreturn
67declare i64 @llvm.dx.imad.i64(i64, i64, i64) #1
68