xref: /llvm-project/llvm/test/CodeGen/DirectX/firstbitlow.ll (revision 4f48abff0fb90ea0a05470755b799cdb1ff79d89) 
1; RUN: opt -S -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
2
3; Make sure dxil operation function calls for firstbitlow are generated for all integer types.
4
5define noundef i32 @test_firstbitlow_short(i16 noundef %a) {
6entry:
7; CHECK: call i32 @dx.op.unaryBits.i16(i32 32, i16 %{{.*}})
8  %elt.firstbitlow = call i32 @llvm.dx.firstbitlow.i16(i16 %a)
9  ret i32 %elt.firstbitlow
10}
11
12define noundef i32 @test_firstbitlow_int(i32 noundef %a) {
13entry:
14; CHECK: call i32 @dx.op.unaryBits.i32(i32 32, i32 %{{.*}})
15  %elt.firstbitlow = call i32 @llvm.dx.firstbitlow.i32(i32 %a)
16  ret i32 %elt.firstbitlow
17}
18
19define noundef i32 @test_firstbitlow_long(i64 noundef %a) {
20entry:
21; CHECK: call i32 @dx.op.unaryBits.i64(i32 32, i64 %{{.*}})
22  %elt.firstbitlow = call i32 @llvm.dx.firstbitlow.i64(i64 %a)
23  ret i32 %elt.firstbitlow
24}
25
26define noundef <4 x i32> @test_firstbitlow_vec4_i32(<4 x i32> noundef %a)  {
27entry:
28  ; CHECK: [[ee0:%.*]] = extractelement <4 x i32> %a, i64 0
29  ; CHECK: [[ie0:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee0]])
30  ; CHECK: [[ee1:%.*]] = extractelement <4 x i32> %a, i64 1
31  ; CHECK: [[ie1:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee1]])
32  ; CHECK: [[ee2:%.*]] = extractelement <4 x i32> %a, i64 2
33  ; CHECK: [[ie2:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee2]])
34  ; CHECK: [[ee3:%.*]] = extractelement <4 x i32> %a, i64 3
35  ; CHECK: [[ie3:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee3]])
36  ; CHECK: insertelement <4 x i32> poison, i32 [[ie0]], i64 0
37  ; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie1]], i64 1
38  ; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie2]], i64 2
39  ; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie3]], i64 3
40  %2 = call <4 x i32> @llvm.dx.firstbitlow.v4i32(<4 x i32> %a)
41  ret <4 x i32> %2
42}
43
44declare i32 @llvm.dx.firstbitlow.i16(i16)
45declare i32 @llvm.dx.firstbitlow.i32(i32)
46declare i32 @llvm.dx.firstbitlow.i64(i64)
47declare <4 x i32> @llvm.dx.firstbitlow.v4i32(<4 x i32>)
48