xref: /llvm-project/llvm/test/CodeGen/DirectX/comput_ids.ll (revision 011b618644113996e2c0a8e57db40f89d20878e3)
1; RUN: opt -S -dxil-op-lower  %s | FileCheck %s
2
3; Make sure dxil operation function calls for all ComputeID dxil operations are generated.
4
5target datalayout = "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:32-f64:64-n8:16:32:64"
6target triple = "dxil-pc-shadermodel6.7-compute"
7
8; CHECK-LABEL: @test_thread_id(
9; Function Attrs: noinline nounwind optnone
10define i32 @test_thread_id(i32 %a) #0 {
11entry:
12; CHECK:call i32 @dx.op.threadId.i32(i32 93, i32 %{{.*}}) #[[#ATTR:]]
13  %0 = call i32 @llvm.dx.thread.id(i32 %a)
14  ret i32 %0
15}
16
17; CHECK-LABEL: @test_group_id(
18; Function Attrs: noinline nounwind optnone
19define i32 @test_group_id(i32 %a) #0 {
20entry:
21; CHECK: call i32 @dx.op.groupId.i32(i32 94, i32 %{{.*}}) #[[#ATTR]]
22  %0 = call i32 @llvm.dx.group.id(i32 %a)
23  ret i32 %0
24}
25
26; CHECK-LABEL: @test_thread_id_in_group(
27; Function Attrs: noinline nounwind optnone
28define i32 @test_thread_id_in_group(i32 %a) #0 {
29entry:
30; CHECK: call i32 @dx.op.threadIdInGroup.i32(i32 95, i32 %{{.*}}) #[[#ATTR]]
31  %0 = call i32 @llvm.dx.thread.id.in.group(i32 %a)
32  ret i32 %0
33}
34
35; CHECK-LABEL: @test_flattened_thread_id_in_group(
36; Function Attrs: noinline nounwind optnone
37define i32 @test_flattened_thread_id_in_group() #0 {
38entry:
39; CHECK: call i32 @dx.op.flattenedThreadIdInGroup.i32(i32 96) #[[#ATTR]]
40  %0 = call i32 @llvm.dx.flattened.thread.id.in.group()
41  ret i32 %0
42}
43
44; CHECK: attributes #[[#ATTR]] = {{{.*}} memory(none) {{.*}}}
45
46; Function Attrs: nounwind readnone willreturn
47declare i32 @llvm.dx.thread.id(i32) #1
48declare i32 @llvm.dx.group.id(i32) #1
49declare i32 @llvm.dx.flattened.thread.id.in.group() #1
50declare i32 @llvm.dx.thread.id.in.group(i32) #1
51
52attributes #0 = { noinline nounwind }
53attributes #1 = { nounwind readnone willreturn }
54