xref: /llvm-project/llvm/test/CodeGen/DirectX/WaveReadLaneAt.ll (revision 011b618644113996e2c0a8e57db40f89d20878e3) 
1; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-compute %s | FileCheck %s
2
3; Test that for scalar values, WaveReadLaneAt maps down to the DirectX op
4
5define noundef half @wave_rla_half(half noundef %expr, i32 noundef %idx) {
6entry:
7; CHECK: call half @dx.op.waveReadLaneAt.f16(i32 117, half %expr, i32 %idx){{$}}
8  %ret = call half @llvm.dx.wave.readlane.f16(half %expr, i32 %idx)
9  ret half %ret
10}
11
12define noundef float @wave_rla_float(float noundef %expr, i32 noundef %idx) {
13entry:
14; CHECK: call float @dx.op.waveReadLaneAt.f32(i32 117, float %expr, i32 %idx){{$}}
15  %ret = call float @llvm.dx.wave.readlane(float %expr, i32 %idx)
16  ret float %ret
17}
18
19define noundef double @wave_rla_double(double noundef %expr, i32 noundef %idx) {
20entry:
21; CHECK: call double @dx.op.waveReadLaneAt.f64(i32 117, double %expr, i32 %idx){{$}}
22  %ret = call double @llvm.dx.wave.readlane(double %expr, i32 %idx)
23  ret double %ret
24}
25
26define noundef i1 @wave_rla_i1(i1 noundef %expr, i32 noundef %idx) {
27entry:
28; CHECK: call i1 @dx.op.waveReadLaneAt.i1(i32 117, i1 %expr, i32 %idx){{$}}
29  %ret = call i1 @llvm.dx.wave.readlane.i1(i1 %expr, i32 %idx)
30  ret i1 %ret
31}
32
33define noundef i16 @wave_rla_i16(i16 noundef %expr, i32 noundef %idx) {
34entry:
35; CHECK: call i16 @dx.op.waveReadLaneAt.i16(i32 117, i16 %expr, i32 %idx){{$}}
36  %ret = call i16 @llvm.dx.wave.readlane.i16(i16 %expr, i32 %idx)
37  ret i16 %ret
38}
39
40define noundef i32 @wave_rla_i32(i32 noundef %expr, i32 noundef %idx) {
41entry:
42; CHECK: call i32 @dx.op.waveReadLaneAt.i32(i32 117, i32 %expr, i32 %idx){{$}}
43  %ret = call i32 @llvm.dx.wave.readlane.i32(i32 %expr, i32 %idx)
44  ret i32 %ret
45}
46
47define noundef i64 @wave_rla_i64(i64 noundef %expr, i32 noundef %idx) {
48entry:
49; CHECK: call i64 @dx.op.waveReadLaneAt.i64(i32 117, i64 %expr, i32 %idx){{$}}
50  %ret = call i64 @llvm.dx.wave.readlane.i64(i64 %expr, i32 %idx)
51  ret i64 %ret
52}
53
54; CHECK-NOT: attributes {{.*}} memory(none)
55
56declare half @llvm.dx.wave.readlane.f16(half, i32)
57declare float @llvm.dx.wave.readlane.f32(float, i32)
58declare double @llvm.dx.wave.readlane.f64(double, i32)
59
60declare i1 @llvm.dx.wave.readlane.i1(i1, i32)
61declare i16 @llvm.dx.wave.readlane.i16(i16, i32)
62declare i32 @llvm.dx.wave.readlane.i32(i32, i32)
63declare i64 @llvm.dx.wave.readlane.i64(i64, i32)
64