xref: /llvm-project/llvm/test/CodeGen/CSKY/cvt-i.ll (revision 27c18558e6f156b193581e6326c386fe4d297159)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+e2 -mattr=+2e3 < %s -mtriple=csky | FileCheck %s
3; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky  | FileCheck %s --check-prefix=GENERIC
4
5; i32/i16/i8/i1 --> i64
6define i64 @zextR_i64_0(i32 %x) {
7; CHECK-LABEL: zextR_i64_0:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    movi16 a1, 0
10; CHECK-NEXT:    rts16
11;
12; GENERIC-LABEL: zextR_i64_0:
13; GENERIC:       # %bb.0: # %entry
14; GENERIC-NEXT:    .cfi_def_cfa_offset 0
15; GENERIC-NEXT:    subi16 sp, sp, 4
16; GENERIC-NEXT:    .cfi_def_cfa_offset 4
17; GENERIC-NEXT:    movi16 a1, 0
18; GENERIC-NEXT:    addi16 sp, sp, 4
19; GENERIC-NEXT:    rts16
20entry:
21  %zext = zext i32 %x to i64
22  ret i64 %zext
23}
24
25define i64 @zextR_i64_1(i16 %x) {
26; CHECK-LABEL: zextR_i64_1:
27; CHECK:       # %bb.0: # %entry
28; CHECK-NEXT:    zexth16 a0, a0
29; CHECK-NEXT:    movi16 a1, 0
30; CHECK-NEXT:    rts16
31;
32; GENERIC-LABEL: zextR_i64_1:
33; GENERIC:       # %bb.0: # %entry
34; GENERIC-NEXT:    .cfi_def_cfa_offset 0
35; GENERIC-NEXT:    subi16 sp, sp, 4
36; GENERIC-NEXT:    .cfi_def_cfa_offset 4
37; GENERIC-NEXT:    movi16 a1, 0
38; GENERIC-NEXT:    lsli16 a2, a1, 24
39; GENERIC-NEXT:    lsli16 a1, a1, 16
40; GENERIC-NEXT:    or16 a1, a2
41; GENERIC-NEXT:    movi16 a2, 255
42; GENERIC-NEXT:    lsli16 a3, a2, 8
43; GENERIC-NEXT:    or16 a3, a1
44; GENERIC-NEXT:    or16 a3, a2
45; GENERIC-NEXT:    and16 a0, a3
46; GENERIC-NEXT:    movi16 a1, 0
47; GENERIC-NEXT:    addi16 sp, sp, 4
48; GENERIC-NEXT:    rts16
49entry:
50  %zext = zext i16 %x to i64
51  ret i64 %zext
52}
53
54define i64 @zextR_i64_2(i8 %x) {
55; CHECK-LABEL: zextR_i64_2:
56; CHECK:       # %bb.0: # %entry
57; CHECK-NEXT:    zextb16 a0, a0
58; CHECK-NEXT:    movi16 a1, 0
59; CHECK-NEXT:    rts16
60;
61; GENERIC-LABEL: zextR_i64_2:
62; GENERIC:       # %bb.0: # %entry
63; GENERIC-NEXT:    .cfi_def_cfa_offset 0
64; GENERIC-NEXT:    subi16 sp, sp, 4
65; GENERIC-NEXT:    .cfi_def_cfa_offset 4
66; GENERIC-NEXT:    movi16 a1, 255
67; GENERIC-NEXT:    and16 a0, a1
68; GENERIC-NEXT:    movi16 a1, 0
69; GENERIC-NEXT:    addi16 sp, sp, 4
70; GENERIC-NEXT:    rts16
71entry:
72  %zext = zext i8 %x to i64
73  ret i64 %zext
74}
75
76define i64 @zextR_i64_3(i1 %x) {
77; CHECK-LABEL: zextR_i64_3:
78; CHECK:       # %bb.0: # %entry
79; CHECK-NEXT:    andi32 a0, a0, 1
80; CHECK-NEXT:    movi16 a1, 0
81; CHECK-NEXT:    rts16
82;
83; GENERIC-LABEL: zextR_i64_3:
84; GENERIC:       # %bb.0: # %entry
85; GENERIC-NEXT:    .cfi_def_cfa_offset 0
86; GENERIC-NEXT:    subi16 sp, sp, 4
87; GENERIC-NEXT:    .cfi_def_cfa_offset 4
88; GENERIC-NEXT:    movi16 a1, 1
89; GENERIC-NEXT:    and16 a0, a1
90; GENERIC-NEXT:    movi16 a1, 0
91; GENERIC-NEXT:    addi16 sp, sp, 4
92; GENERIC-NEXT:    rts16
93entry:
94  %zext = zext i1 %x to i64
95  ret i64 %zext
96}
97
98; i16/i8/i1 --> i32
99define i32 @zextR_i32_1(i16 %x) {
100; CHECK-LABEL: zextR_i32_1:
101; CHECK:       # %bb.0: # %entry
102; CHECK-NEXT:    zexth16 a0, a0
103; CHECK-NEXT:    rts16
104;
105; GENERIC-LABEL: zextR_i32_1:
106; GENERIC:       # %bb.0: # %entry
107; GENERIC-NEXT:    .cfi_def_cfa_offset 0
108; GENERIC-NEXT:    subi16 sp, sp, 4
109; GENERIC-NEXT:    .cfi_def_cfa_offset 4
110; GENERIC-NEXT:    movi16 a1, 0
111; GENERIC-NEXT:    lsli16 a2, a1, 24
112; GENERIC-NEXT:    lsli16 a1, a1, 16
113; GENERIC-NEXT:    or16 a1, a2
114; GENERIC-NEXT:    movi16 a2, 255
115; GENERIC-NEXT:    lsli16 a3, a2, 8
116; GENERIC-NEXT:    or16 a3, a1
117; GENERIC-NEXT:    or16 a3, a2
118; GENERIC-NEXT:    and16 a0, a3
119; GENERIC-NEXT:    addi16 sp, sp, 4
120; GENERIC-NEXT:    rts16
121entry:
122  %zext = zext i16 %x to i32
123  ret i32 %zext
124}
125
126define i32 @zextR_i32_2(i8 %x) {
127; CHECK-LABEL: zextR_i32_2:
128; CHECK:       # %bb.0: # %entry
129; CHECK-NEXT:    zextb16 a0, a0
130; CHECK-NEXT:    rts16
131;
132; GENERIC-LABEL: zextR_i32_2:
133; GENERIC:       # %bb.0: # %entry
134; GENERIC-NEXT:    .cfi_def_cfa_offset 0
135; GENERIC-NEXT:    subi16 sp, sp, 4
136; GENERIC-NEXT:    .cfi_def_cfa_offset 4
137; GENERIC-NEXT:    movi16 a1, 255
138; GENERIC-NEXT:    and16 a0, a1
139; GENERIC-NEXT:    addi16 sp, sp, 4
140; GENERIC-NEXT:    rts16
141entry:
142  %zext = zext i8 %x to i32
143  ret i32 %zext
144}
145
146define i32 @zextR_i32_3(i1 %x) {
147; CHECK-LABEL: zextR_i32_3:
148; CHECK:       # %bb.0: # %entry
149; CHECK-NEXT:    andi32 a0, a0, 1
150; CHECK-NEXT:    rts16
151;
152; GENERIC-LABEL: zextR_i32_3:
153; GENERIC:       # %bb.0: # %entry
154; GENERIC-NEXT:    .cfi_def_cfa_offset 0
155; GENERIC-NEXT:    subi16 sp, sp, 4
156; GENERIC-NEXT:    .cfi_def_cfa_offset 4
157; GENERIC-NEXT:    movi16 a1, 1
158; GENERIC-NEXT:    and16 a0, a1
159; GENERIC-NEXT:    addi16 sp, sp, 4
160; GENERIC-NEXT:    rts16
161entry:
162  %zext = zext i1 %x to i32
163  ret i32 %zext
164}
165
166; i8/i1 --> i16
167define i16 @zextR_i16_2(i8 %x) {
168; CHECK-LABEL: zextR_i16_2:
169; CHECK:       # %bb.0: # %entry
170; CHECK-NEXT:    zextb16 a0, a0
171; CHECK-NEXT:    rts16
172;
173; GENERIC-LABEL: zextR_i16_2:
174; GENERIC:       # %bb.0: # %entry
175; GENERIC-NEXT:    .cfi_def_cfa_offset 0
176; GENERIC-NEXT:    subi16 sp, sp, 4
177; GENERIC-NEXT:    .cfi_def_cfa_offset 4
178; GENERIC-NEXT:    movi16 a1, 255
179; GENERIC-NEXT:    and16 a0, a1
180; GENERIC-NEXT:    addi16 sp, sp, 4
181; GENERIC-NEXT:    rts16
182entry:
183  %zext = zext i8 %x to i16
184  ret i16 %zext
185}
186
187define i16 @zextR_i16_3(i1 %x) {
188; CHECK-LABEL: zextR_i16_3:
189; CHECK:       # %bb.0: # %entry
190; CHECK-NEXT:    andi32 a0, a0, 1
191; CHECK-NEXT:    rts16
192;
193; GENERIC-LABEL: zextR_i16_3:
194; GENERIC:       # %bb.0: # %entry
195; GENERIC-NEXT:    .cfi_def_cfa_offset 0
196; GENERIC-NEXT:    subi16 sp, sp, 4
197; GENERIC-NEXT:    .cfi_def_cfa_offset 4
198; GENERIC-NEXT:    movi16 a1, 1
199; GENERIC-NEXT:    and16 a0, a1
200; GENERIC-NEXT:    addi16 sp, sp, 4
201; GENERIC-NEXT:    rts16
202entry:
203  %zext = zext i1 %x to i16
204  ret i16 %zext
205}
206
207;i1 --> i8
208define i8 @zextR_i8_3(i1 %x) {
209; CHECK-LABEL: zextR_i8_3:
210; CHECK:       # %bb.0: # %entry
211; CHECK-NEXT:    andi32 a0, a0, 1
212; CHECK-NEXT:    rts16
213;
214; GENERIC-LABEL: zextR_i8_3:
215; GENERIC:       # %bb.0: # %entry
216; GENERIC-NEXT:    .cfi_def_cfa_offset 0
217; GENERIC-NEXT:    subi16 sp, sp, 4
218; GENERIC-NEXT:    .cfi_def_cfa_offset 4
219; GENERIC-NEXT:    movi16 a1, 1
220; GENERIC-NEXT:    and16 a0, a1
221; GENERIC-NEXT:    addi16 sp, sp, 4
222; GENERIC-NEXT:    rts16
223entry:
224  %zext = zext i1 %x to i8
225  ret i8 %zext
226}
227
228; i32/i16/i8/i1 --> i64
229define i64 @sextR_i64_0(i32 %x) {
230; CHECK-LABEL: sextR_i64_0:
231; CHECK:       # %bb.0: # %entry
232; CHECK-NEXT:    asri16 a1, a0, 31
233; CHECK-NEXT:    rts16
234;
235; GENERIC-LABEL: sextR_i64_0:
236; GENERIC:       # %bb.0: # %entry
237; GENERIC-NEXT:    .cfi_def_cfa_offset 0
238; GENERIC-NEXT:    subi16 sp, sp, 4
239; GENERIC-NEXT:    .cfi_def_cfa_offset 4
240; GENERIC-NEXT:    asri16 a1, a0, 31
241; GENERIC-NEXT:    addi16 sp, sp, 4
242; GENERIC-NEXT:    rts16
243entry:
244  %sext = sext i32 %x to i64
245  ret i64 %sext
246}
247
248define i64 @sextR_i64_1(i16 %x) {
249; CHECK-LABEL: sextR_i64_1:
250; CHECK:       # %bb.0: # %entry
251; CHECK-NEXT:    sexth16 a0, a0
252; CHECK-NEXT:    asri16 a1, a0, 31
253; CHECK-NEXT:    rts16
254;
255; GENERIC-LABEL: sextR_i64_1:
256; GENERIC:       # %bb.0: # %entry
257; GENERIC-NEXT:    .cfi_def_cfa_offset 0
258; GENERIC-NEXT:    subi16 sp, sp, 4
259; GENERIC-NEXT:    .cfi_def_cfa_offset 4
260; GENERIC-NEXT:    sexth16 a0, a0
261; GENERIC-NEXT:    asri16 a1, a0, 31
262; GENERIC-NEXT:    addi16 sp, sp, 4
263; GENERIC-NEXT:    rts16
264entry:
265  %sext = sext i16 %x to i64
266  ret i64 %sext
267}
268
269define i64 @sextR_i64_2(i8 %x) {
270; CHECK-LABEL: sextR_i64_2:
271; CHECK:       # %bb.0: # %entry
272; CHECK-NEXT:    sextb16 a0, a0
273; CHECK-NEXT:    asri16 a1, a0, 31
274; CHECK-NEXT:    rts16
275;
276; GENERIC-LABEL: sextR_i64_2:
277; GENERIC:       # %bb.0: # %entry
278; GENERIC-NEXT:    .cfi_def_cfa_offset 0
279; GENERIC-NEXT:    subi16 sp, sp, 4
280; GENERIC-NEXT:    .cfi_def_cfa_offset 4
281; GENERIC-NEXT:    sextb16 a0, a0
282; GENERIC-NEXT:    asri16 a1, a0, 31
283; GENERIC-NEXT:    addi16 sp, sp, 4
284; GENERIC-NEXT:    rts16
285entry:
286  %sext = sext i8 %x to i64
287  ret i64 %sext
288}
289
290define i64 @sextR_i64_3(i1 %x) {
291; CHECK-LABEL: sextR_i64_3:
292; CHECK:       # %bb.0: # %entry
293; CHECK-NEXT:    sext32 a0, a0, 0, 0
294; CHECK-NEXT:    mov16 a1, a0
295; CHECK-NEXT:    rts16
296;
297; GENERIC-LABEL: sextR_i64_3:
298; GENERIC:       # %bb.0: # %entry
299; GENERIC-NEXT:    .cfi_def_cfa_offset 0
300; GENERIC-NEXT:    subi16 sp, sp, 4
301; GENERIC-NEXT:    .cfi_def_cfa_offset 4
302; GENERIC-NEXT:    lsli16 a0, a0, 7
303; GENERIC-NEXT:    asri16 a0, a0, 7
304; GENERIC-NEXT:    mov16 a1, a0
305; GENERIC-NEXT:    addi16 sp, sp, 4
306; GENERIC-NEXT:    rts16
307entry:
308  %sext = sext i1 %x to i64
309  ret i64 %sext
310}
311
312; i16/i8/i1 --> i32
313define i32 @sextR_i32_1(i16 %x) {
314; CHECK-LABEL: sextR_i32_1:
315; CHECK:       # %bb.0: # %entry
316; CHECK-NEXT:    sexth16 a0, a0
317; CHECK-NEXT:    rts16
318;
319; GENERIC-LABEL: sextR_i32_1:
320; GENERIC:       # %bb.0: # %entry
321; GENERIC-NEXT:    .cfi_def_cfa_offset 0
322; GENERIC-NEXT:    subi16 sp, sp, 4
323; GENERIC-NEXT:    .cfi_def_cfa_offset 4
324; GENERIC-NEXT:    sexth16 a0, a0
325; GENERIC-NEXT:    addi16 sp, sp, 4
326; GENERIC-NEXT:    rts16
327entry:
328  %sext = sext i16 %x to i32
329  ret i32 %sext
330}
331
332define i32 @sextR_i32_2(i8 %x) {
333; CHECK-LABEL: sextR_i32_2:
334; CHECK:       # %bb.0: # %entry
335; CHECK-NEXT:    sextb16 a0, a0
336; CHECK-NEXT:    rts16
337;
338; GENERIC-LABEL: sextR_i32_2:
339; GENERIC:       # %bb.0: # %entry
340; GENERIC-NEXT:    .cfi_def_cfa_offset 0
341; GENERIC-NEXT:    subi16 sp, sp, 4
342; GENERIC-NEXT:    .cfi_def_cfa_offset 4
343; GENERIC-NEXT:    sextb16 a0, a0
344; GENERIC-NEXT:    addi16 sp, sp, 4
345; GENERIC-NEXT:    rts16
346entry:
347  %sext = sext i8 %x to i32
348  ret i32 %sext
349}
350
351define i32 @sextR_i32_3(i1 %x) {
352; CHECK-LABEL: sextR_i32_3:
353; CHECK:       # %bb.0: # %entry
354; CHECK-NEXT:    sext32 a0, a0, 0, 0
355; CHECK-NEXT:    rts16
356;
357; GENERIC-LABEL: sextR_i32_3:
358; GENERIC:       # %bb.0: # %entry
359; GENERIC-NEXT:    .cfi_def_cfa_offset 0
360; GENERIC-NEXT:    subi16 sp, sp, 4
361; GENERIC-NEXT:    .cfi_def_cfa_offset 4
362; GENERIC-NEXT:    lsli16 a0, a0, 7
363; GENERIC-NEXT:    asri16 a0, a0, 7
364; GENERIC-NEXT:    addi16 sp, sp, 4
365; GENERIC-NEXT:    rts16
366entry:
367  %sext = sext i1 %x to i32
368  ret i32 %sext
369}
370
371; i8/i1 --> i16
372define i16 @sextR_i16_2(i8 %x) {
373; CHECK-LABEL: sextR_i16_2:
374; CHECK:       # %bb.0: # %entry
375; CHECK-NEXT:    sextb16 a0, a0
376; CHECK-NEXT:    rts16
377;
378; GENERIC-LABEL: sextR_i16_2:
379; GENERIC:       # %bb.0: # %entry
380; GENERIC-NEXT:    .cfi_def_cfa_offset 0
381; GENERIC-NEXT:    subi16 sp, sp, 4
382; GENERIC-NEXT:    .cfi_def_cfa_offset 4
383; GENERIC-NEXT:    sextb16 a0, a0
384; GENERIC-NEXT:    addi16 sp, sp, 4
385; GENERIC-NEXT:    rts16
386entry:
387  %sext = sext i8 %x to i16
388  ret i16 %sext
389}
390
391define i16 @sextR_i16_3(i1 %x) {
392; CHECK-LABEL: sextR_i16_3:
393; CHECK:       # %bb.0: # %entry
394; CHECK-NEXT:    sext32 a0, a0, 0, 0
395; CHECK-NEXT:    rts16
396;
397; GENERIC-LABEL: sextR_i16_3:
398; GENERIC:       # %bb.0: # %entry
399; GENERIC-NEXT:    .cfi_def_cfa_offset 0
400; GENERIC-NEXT:    subi16 sp, sp, 4
401; GENERIC-NEXT:    .cfi_def_cfa_offset 4
402; GENERIC-NEXT:    lsli16 a0, a0, 7
403; GENERIC-NEXT:    asri16 a0, a0, 7
404; GENERIC-NEXT:    addi16 sp, sp, 4
405; GENERIC-NEXT:    rts16
406entry:
407  %sext = sext i1 %x to i16
408  ret i16 %sext
409}
410
411;i1 --> i8
412define i8 @sextR_i8_3(i1 %x) {
413; CHECK-LABEL: sextR_i8_3:
414; CHECK:       # %bb.0: # %entry
415; CHECK-NEXT:    sext32 a0, a0, 0, 0
416; CHECK-NEXT:    rts16
417;
418; GENERIC-LABEL: sextR_i8_3:
419; GENERIC:       # %bb.0: # %entry
420; GENERIC-NEXT:    .cfi_def_cfa_offset 0
421; GENERIC-NEXT:    subi16 sp, sp, 4
422; GENERIC-NEXT:    .cfi_def_cfa_offset 4
423; GENERIC-NEXT:    lsli16 a0, a0, 7
424; GENERIC-NEXT:    asri16 a0, a0, 7
425; GENERIC-NEXT:    addi16 sp, sp, 4
426; GENERIC-NEXT:    rts16
427entry:
428  %sext = sext i1 %x to i8
429  ret i8 %sext
430}
431