xref: /llvm-project/llvm/test/CodeGen/AVR/zeroreg.ll (revision 9ef1d37ffb5f56a9b949a6307bbb16c2ea0130e3)
1; RUN: llc -mattr=avr6,sram < %s -mtriple=avr | FileCheck %s
2
3; This file tests whether the compiler correctly works with the r1 register,
4; clearing it when needed.
5
6; Test regular use of r1 as a zero register.
7; CHECK-LABEL: store8zero:
8; CHECK:      st {{[XYZ]}}, r1
9; CHECK-NEXT: mov r24, r1
10; CHECK-NEXT: ret
11define i8 @store8zero(ptr %x) {
12  store i8 0, ptr %x
13  ret i8 0
14}
15
16; Test that mulitplication instructions (mul, muls, etc) clobber r1 and require
17; a "clr r1" instruction.
18; CHECK-LABEL: mul:
19; CHECK:      muls
20; CHECK-NEXT: clr r1
21; CHECK-NEXT: st {{[XYZ]}}, r0
22; CHECK-NEXT: ret
23define void @mul(ptr %ptr, i8 %n) {
24  %result = mul i8 %n, 3
25  store i8 %result, ptr %ptr
26  ret void
27}
28