xref: /llvm-project/llvm/test/CodeGen/AVR/unaligned-atomic-ops.ll (revision 9ef1d37ffb5f56a9b949a6307bbb16c2ea0130e3)
1; RUN: llc -mattr=addsubiw < %s -mtriple=avr | FileCheck %s
2
3; This verifies that the backend can handle an unaligned atomic load and store.
4;
5; In the past, an assertion inside the SelectionDAGBuilder would always
6; hit an assertion for unaligned loads and stores.
7
8%AtomicI16 = type { %CellI16, [0 x i8] }
9%CellI16 = type { i16, [0 x i8] }
10
11; CHECK-LABEL: foo
12; CHECK: ret
13define void @foo(ptr %self) {
14start:
15  %a = getelementptr inbounds %AtomicI16, ptr %self, i16 0, i32 0, i32 0
16  load atomic i16, ptr %a seq_cst, align 1
17  store atomic i16 5, ptr %a seq_cst, align 1
18  ret void
19}
20
21