xref: /llvm-project/llvm/test/CodeGen/AVR/lpmx.ll (revision 7bdc80f35c325d148b1ddbdfce7dea8c6ba7af84)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=avr --mcpu=atmega328 -O0 -verify-machineinstrs \
3; RUN:     | FileCheck -check-prefix=CHECK-O0 %s
4; RUN: llc < %s -mtriple=avr --mcpu=atmega328 -O3 -verify-machineinstrs \
5; RUN:     | FileCheck -check-prefix=CHECK-O3 %s
6
7@arr0 = addrspace(1) constant [4 x i16] [i16 123, i16 234, i16 456, i16 67], align 1
8@arr1 = addrspace(1) constant [4 x i8] c"ABCD", align 1
9
10define i16 @foo0(i16 %a) addrspace(1) {
11; CHECK-O0-LABEL: foo0:
12; CHECK-O0:       ; %bb.0: ; %entry
13; CHECK-O0-NEXT:    push r28
14; CHECK-O0-NEXT:    push r29
15; CHECK-O0-NEXT:    in r28, 61
16; CHECK-O0-NEXT:    in r29, 62
17; CHECK-O0-NEXT:    sbiw r28, 2
18; CHECK-O0-NEXT:    in r0, 63
19; CHECK-O0-NEXT:    cli
20; CHECK-O0-NEXT:    out 62, r29
21; CHECK-O0-NEXT:    out 63, r0
22; CHECK-O0-NEXT:    out 61, r28
23; CHECK-O0-NEXT:    std Y+2, r25
24; CHECK-O0-NEXT:    std Y+1, r24
25; CHECK-O0-NEXT:    ldd r30, Y+1
26; CHECK-O0-NEXT:    ldd r31, Y+2
27; CHECK-O0-NEXT:    lsl r30
28; CHECK-O0-NEXT:    rol r31
29; CHECK-O0-NEXT:    subi r30, lo8(-(arr0))
30; CHECK-O0-NEXT:    sbci r31, hi8(-(arr0))
31; CHECK-O0-NEXT:    lpm r24, Z+
32; CHECK-O0-NEXT:    lpm r25, Z
33; CHECK-O0-NEXT:    adiw r28, 2
34; CHECK-O0-NEXT:    in r0, 63
35; CHECK-O0-NEXT:    cli
36; CHECK-O0-NEXT:    out 62, r29
37; CHECK-O0-NEXT:    out 63, r0
38; CHECK-O0-NEXT:    out 61, r28
39; CHECK-O0-NEXT:    pop r29
40; CHECK-O0-NEXT:    pop r28
41; CHECK-O0-NEXT:    ret
42;
43; CHECK-O3-LABEL: foo0:
44; CHECK-O3:       ; %bb.0: ; %entry
45; CHECK-O3-NEXT:    push r28
46; CHECK-O3-NEXT:    push r29
47; CHECK-O3-NEXT:    in r28, 61
48; CHECK-O3-NEXT:    in r29, 62
49; CHECK-O3-NEXT:    sbiw r28, 2
50; CHECK-O3-NEXT:    in r0, 63
51; CHECK-O3-NEXT:    cli
52; CHECK-O3-NEXT:    out 62, r29
53; CHECK-O3-NEXT:    out 63, r0
54; CHECK-O3-NEXT:    out 61, r28
55; CHECK-O3-NEXT:    std Y+2, r25
56; CHECK-O3-NEXT:    std Y+1, r24
57; CHECK-O3-NEXT:    lsl r24
58; CHECK-O3-NEXT:    rol r25
59; CHECK-O3-NEXT:    subi r24, lo8(-(arr0))
60; CHECK-O3-NEXT:    sbci r25, hi8(-(arr0))
61; CHECK-O3-NEXT:    movw r30, r24
62; CHECK-O3-NEXT:    lpm r24, Z+
63; CHECK-O3-NEXT:    lpm r25, Z
64; CHECK-O3-NEXT:    adiw r28, 2
65; CHECK-O3-NEXT:    in r0, 63
66; CHECK-O3-NEXT:    cli
67; CHECK-O3-NEXT:    out 62, r29
68; CHECK-O3-NEXT:    out 63, r0
69; CHECK-O3-NEXT:    out 61, r28
70; CHECK-O3-NEXT:    pop r29
71; CHECK-O3-NEXT:    pop r28
72; CHECK-O3-NEXT:    ret
73entry:
74  %a.addr = alloca i16, align 1
75  store i16 %a, ptr %a.addr, align 1
76  %0 = load i16, ptr %a.addr, align 1
77  %arrayidx = getelementptr inbounds [4 x i16], ptr addrspace(1) @arr0, i16 0, i16 %0
78  %1 = load i16, ptr addrspace(1) %arrayidx, align 1
79  ret i16 %1
80}
81
82define i8 @foo1(i16 %a) addrspace(1) {
83; CHECK-O0-LABEL: foo1:
84; CHECK-O0:       ; %bb.0: ; %entry
85; CHECK-O0-NEXT:    push r28
86; CHECK-O0-NEXT:    push r29
87; CHECK-O0-NEXT:    in r28, 61
88; CHECK-O0-NEXT:    in r29, 62
89; CHECK-O0-NEXT:    sbiw r28, 2
90; CHECK-O0-NEXT:    in r0, 63
91; CHECK-O0-NEXT:    cli
92; CHECK-O0-NEXT:    out 62, r29
93; CHECK-O0-NEXT:    out 63, r0
94; CHECK-O0-NEXT:    out 61, r28
95; CHECK-O0-NEXT:    std Y+2, r25
96; CHECK-O0-NEXT:    std Y+1, r24
97; CHECK-O0-NEXT:    ldd r30, Y+1
98; CHECK-O0-NEXT:    ldd r31, Y+2
99; CHECK-O0-NEXT:    subi r30, lo8(-(arr1))
100; CHECK-O0-NEXT:    sbci r31, hi8(-(arr1))
101; CHECK-O0-NEXT:    lpm r24, Z
102; CHECK-O0-NEXT:    adiw r28, 2
103; CHECK-O0-NEXT:    in r0, 63
104; CHECK-O0-NEXT:    cli
105; CHECK-O0-NEXT:    out 62, r29
106; CHECK-O0-NEXT:    out 63, r0
107; CHECK-O0-NEXT:    out 61, r28
108; CHECK-O0-NEXT:    pop r29
109; CHECK-O0-NEXT:    pop r28
110; CHECK-O0-NEXT:    ret
111;
112; CHECK-O3-LABEL: foo1:
113; CHECK-O3:       ; %bb.0: ; %entry
114; CHECK-O3-NEXT:    push r28
115; CHECK-O3-NEXT:    push r29
116; CHECK-O3-NEXT:    in r28, 61
117; CHECK-O3-NEXT:    in r29, 62
118; CHECK-O3-NEXT:    sbiw r28, 2
119; CHECK-O3-NEXT:    in r0, 63
120; CHECK-O3-NEXT:    cli
121; CHECK-O3-NEXT:    out 62, r29
122; CHECK-O3-NEXT:    out 63, r0
123; CHECK-O3-NEXT:    out 61, r28
124; CHECK-O3-NEXT:    std Y+2, r25
125; CHECK-O3-NEXT:    std Y+1, r24
126; CHECK-O3-NEXT:    subi r24, lo8(-(arr1))
127; CHECK-O3-NEXT:    sbci r25, hi8(-(arr1))
128; CHECK-O3-NEXT:    movw r30, r24
129; CHECK-O3-NEXT:    lpm r24, Z
130; CHECK-O3-NEXT:    adiw r28, 2
131; CHECK-O3-NEXT:    in r0, 63
132; CHECK-O3-NEXT:    cli
133; CHECK-O3-NEXT:    out 62, r29
134; CHECK-O3-NEXT:    out 63, r0
135; CHECK-O3-NEXT:    out 61, r28
136; CHECK-O3-NEXT:    pop r29
137; CHECK-O3-NEXT:    pop r28
138; CHECK-O3-NEXT:    ret
139entry:
140  %a.addr = alloca i16, align 1
141  store i16 %a, ptr %a.addr, align 1
142  %0 = load i16, ptr %a.addr, align 1
143  %arrayidx = getelementptr inbounds [4 x i8], ptr addrspace(1) @arr1, i16 0, i16 %0
144  %1 = load i8, ptr addrspace(1) %arrayidx, align 1
145  ret i8 %1
146}
147