xref: /llvm-project/llvm/test/CodeGen/AVR/ldd-immediate-overflow.ll (revision 9ef1d37ffb5f56a9b949a6307bbb16c2ea0130e3)
1; RUN: llc -mtriple=avr -filetype=asm -O1 < %s | FileCheck %s
2
3define void @check60(ptr %1) {
4; CHECK-LABEL: check60:
5; CHECK-NEXT: %bb.0
6; CHECK-NEXT: mov r30, r24
7; CHECK-NEXT: mov r31, r25
8; CHECK-NEXT: ldd r24, Z+60
9; CHECK-NEXT: ldd r25, Z+61
10; CHECK-NEXT: ldd r18, Z+62
11; CHECK-NEXT: ldd r19, Z+63
12; CHECK-NEXT: sts 3, r19
13; CHECK-NEXT: sts 2, r18
14; CHECK-NEXT: sts 1, r25
15; CHECK-NEXT: sts 0, r24
16; CHECK-NEXT: ret
17
18bb0:
19  %2 = getelementptr i8, ptr %1, i16 60
20  %3 = load i32, ptr %2, align 1
21  store i32 %3, ptr null, align 1
22  ret void
23}
24
25define void @check61(ptr %1) {
26; CHECK-LABEL: check61:
27; CHECK-NEXT: %bb.0
28; CHECK-NEXT: mov r30, r24
29; CHECK-NEXT: mov r31, r25
30; CHECK-NEXT: ldd r18, Z+61
31; CHECK-NEXT: ldd r19, Z+62
32; CHECK-NEXT: adiw r24, 63
33; CHECK-NEXT: mov r30, r24
34; CHECK-NEXT: mov r31, r25
35; CHECK-NEXT: ld r24, Z
36; CHECK-NEXT: ldd r25, Z+1
37; CHECK-NEXT: sts 3, r25
38; CHECK-NEXT: sts 2, r24
39; CHECK-NEXT: sts 1, r19
40; CHECK-NEXT: sts 0, r18
41; CHECK-NEXT: ret
42
43bb0:
44  %2 = getelementptr i8, ptr %1, i16 61
45  %3 = load i32, ptr %2, align 1
46  store i32 %3, ptr null, align 1
47  ret void
48}
49
50define void @check62(ptr %1) {
51; CHECK-LABEL: check62:
52; CHECK-NEXT: %bb.0
53; CHECK-NEXT: mov r30, r24
54; CHECK-NEXT: mov r31, r25
55; CHECK-NEXT: ldd r18, Z+62
56; CHECK-NEXT: ldd r19, Z+63
57; CHECK-NEXT: adiw r24, 62
58; CHECK-NEXT: mov r30, r24
59; CHECK-NEXT: mov r31, r25
60; CHECK-NEXT: ldd r24, Z+2
61; CHECK-NEXT: ldd r25, Z+3
62; CHECK-NEXT: sts 3, r25
63; CHECK-NEXT: sts 2, r24
64; CHECK-NEXT: sts 1, r19
65; CHECK-NEXT: sts 0, r18
66; CHECK-NEXT: ret
67
68bb0:
69  %2 = getelementptr i8, ptr %1, i16 62
70  %3 = load i32, ptr %2, align 1
71  store i32 %3, ptr null, align 1
72  ret void
73}
74
75define void @check63(ptr %1) {
76; CHECK-LABEL: check63:
77; CHECK-NEXT: %bb.0
78; CHECK-NEXT: adiw r24, 63
79; CHECK-NEXT: mov r30, r24
80; CHECK-NEXT: mov r31, r25
81; CHECK-NEXT: ld r24, Z
82; CHECK-NEXT: ldd r25, Z+1
83; CHECK-NEXT: ldd r18, Z+2
84; CHECK-NEXT: ldd r19, Z+3
85; CHECK-NEXT: sts 3, r19
86; CHECK-NEXT: sts 2, r18
87; CHECK-NEXT: sts 1, r25
88; CHECK-NEXT: sts 0, r24
89; CHECK-NEXT: ret
90
91bb0:
92  %2 = getelementptr i8, ptr %1, i16 63
93  %3 = load i32, ptr %2, align 1
94  store i32 %3, ptr null, align 1
95  ret void
96}
97
98define void @check64(ptr %1) {
99; CHECK-LABEL: check64:
100; CHECK-NEXT: %bb.0
101; CHECK-NEXT: subi r24, 192
102; CHECK-NEXT: sbci r25, 255
103; CHECK-NEXT: mov r30, r24
104; CHECK-NEXT: mov r31, r25
105; CHECK-NEXT: ld r24, Z
106; CHECK-NEXT: ldd r25, Z+1
107; CHECK-NEXT: ldd r18, Z+2
108; CHECK-NEXT: ldd r19, Z+3
109; CHECK-NEXT: sts 3, r19
110; CHECK-NEXT: sts 2, r18
111; CHECK-NEXT: sts 1, r25
112; CHECK-NEXT: sts 0, r24
113; CHECK-NEXT: ret
114
115bb0:
116  %2 = getelementptr i8, ptr %1, i16 64
117  %3 = load i32, ptr %2, align 1
118  store i32 %3, ptr null, align 1
119  ret void
120}
121
122define void @check65(ptr %1) {
123; CHECK-LABEL: check65:
124; CHECK-NEXT: %bb.0
125; CHECK-NEXT: subi r24, 191
126; CHECK-NEXT: sbci r25, 255
127; CHECK-NEXT: mov r30, r24
128; CHECK-NEXT: mov r31, r25
129; CHECK-NEXT: ld r24, Z
130; CHECK-NEXT: ldd r25, Z+1
131; CHECK-NEXT: ldd r18, Z+2
132; CHECK-NEXT: ldd r19, Z+3
133; CHECK-NEXT: sts 3, r19
134; CHECK-NEXT: sts 2, r18
135; CHECK-NEXT: sts 1, r25
136; CHECK-NEXT: sts 0, r24
137; CHECK-NEXT: ret
138
139bb0:
140  %2 = getelementptr i8, ptr %1, i16 65
141  %3 = load i32, ptr %2, align 1
142  store i32 %3, ptr null, align 1
143  ret void
144}
145