xref: /llvm-project/llvm/test/CodeGen/AVR/ctlz.ll (revision 9ef1d37ffb5f56a9b949a6307bbb16c2ea0130e3)
1; RUN: llc < %s -mtriple=avr | FileCheck %s
2
3define i8 @count_leading_zeros(i8) unnamed_addr {
4entry-block:
5  %1 = tail call i8 @llvm.ctlz.i8(i8 %0)
6  ret i8 %1
7}
8
9declare i8 @llvm.ctlz.i8(i8)
10
11; CHECK-LABEL: count_leading_zeros:
12; CHECK: cpi    [[RESULT:r[0-9]+]], 0
13; CHECK: breq   .LBB0_2
14; CHECK: mov    [[SCRATCH:r[0-9]+]], {{.*}}[[RESULT]]
15; CHECK: lsr    {{.*}}[[SCRATCH]]
16; CHECK: or     {{.*}}[[SCRATCH]], {{.*}}[[RESULT]]
17; CHECK: mov    {{.*}}[[RESULT]], {{.*}}[[SCRATCH]]
18; CHECK: lsr    {{.*}}[[RESULT]]
19; CHECK: lsr    {{.*}}[[RESULT]]
20; CHECK: or     {{.*}}[[RESULT]], {{.*}}[[SCRATCH]]
21; CHECK: mov    {{.*}}[[SCRATCH]], {{.*}}[[RESULT]]
22; CHECK: swap   {{.*}}[[SCRATCH]]
23; CHECK: andi   {{.*}}[[SCRATCH]], 15
24; CHECK: or     {{.*}}[[SCRATCH]], {{.*}}[[RESULT]]
25; CHECK: com    {{.*}}[[SCRATCH]]
26; CHECK: mov    {{.*}}[[RESULT]], {{.*}}[[SCRATCH]]
27; CHECK: lsr    {{.*}}[[RESULT]]
28; CHECK: andi   {{.*}}[[RESULT]], 85
29; CHECK: sub    {{.*}}[[SCRATCH]], {{.*}}[[RESULT]]
30; CHECK: mov    {{.*}}[[RESULT]], {{.*}}[[SCRATCH]]
31; CHECK: andi   {{.*}}[[RESULT]], 51
32; CHECK: lsr    {{.*}}[[SCRATCH]]
33; CHECK: lsr    {{.*}}[[SCRATCH]]
34; CHECK: andi   {{.*}}[[SCRATCH]], 51
35; CHECK: add    {{.*}}[[SCRATCH]], {{.*}}[[RESULT]]
36; CHECK: mov    {{.*}}[[RESULT]], {{.*}}[[SCRATCH]]
37; CHECK: swap   {{.*}}[[RESULT]]
38; CHECK: add    {{.*}}[[RESULT]], {{.*}}[[SCRATCH]]
39; CHECK: andi   {{.*}}[[RESULT]], 15
40; CHECK: ret
41; CHECK: LBB0_2:
42; CHECK: ldi    {{.*}}[[RESULT]], 8
43; CHECK: ret
44