1; RUN: llc -mattr=avr6 < %s -mtriple=avr | FileCheck %s 2 3; CHECK-LABEL: atomic_load16 4; CHECK: in r0, 63 5; CHECK-NEXT: cli 6; CHECK-NEXT: ld [[RR:r[0-9]+]], [[RD:(X|Y|Z)]] 7; CHECK-NEXT: ldd [[RR:r[0-9]+]], [[RD]]+1 8; CHECK-NEXT: out 63, r0 9define i16 @atomic_load16(ptr %foo) { 10 %val = load atomic i16, ptr %foo unordered, align 2 11 ret i16 %val 12} 13 14; CHECK-LABEL: atomic_load_swap16 15; CHECK: call __sync_lock_test_and_set_2 16define i16 @atomic_load_swap16(ptr %foo) { 17 %val = atomicrmw xchg ptr %foo, i16 13 seq_cst 18 ret i16 %val 19} 20 21; CHECK-LABEL: atomic_load_cmp_swap16 22; CHECK: call __sync_val_compare_and_swap_2 23define i16 @atomic_load_cmp_swap16(ptr %foo) { 24 %val = cmpxchg ptr %foo, i16 5, i16 10 acq_rel monotonic 25 %value_loaded = extractvalue { i16, i1 } %val, 0 26 ret i16 %value_loaded 27} 28 29; CHECK-LABEL: atomic_load_add16 30; CHECK: in r0, 63 31; CHECK-NEXT: cli 32; CHECK-NEXT: ld [[RDL:r[0-9]+]], [[RR:(X|Y|Z)]] 33; CHECK-NEXT: ldd [[RDH:r[0-9]+]], [[RR]]+1 34; CHECK-NEXT: add [[RR1L:r[0-9]+]], [[RDL]] 35; CHECK-NEXT: adc [[RR1H:r[0-9]+]], [[RDH]] 36; CHECK-NEXT: std [[RR]]+1, [[RR1H]] 37; CHECK-NEXT: st [[RR]], [[RR1L]] 38; CHECK-NEXT: out 63, r0 39define i16 @atomic_load_add16(ptr %foo) { 40 %val = atomicrmw add ptr %foo, i16 13 seq_cst 41 ret i16 %val 42} 43 44; CHECK-LABEL: atomic_load_sub16 45; CHECK: in r0, 63 46; CHECK-NEXT: cli 47; CHECK-NEXT: ld [[RDL:r[0-9]+]], [[RR:(X|Y|Z)]] 48; CHECK-NEXT: ldd [[RDH:r[0-9]+]], [[RR]]+1 49; CHECK-NEXT: movw [[TMPL:r[0-9]+]], [[RDL]] 50; CHECK-NEXT: sub [[TMPL]], [[RR1L:r[0-9]+]] 51; CHECK-NEXT: sbc [[TMPH:r[0-9]+]], [[RR1H:r[0-9]+]] 52; CHECK-NEXT: std [[RR]]+1, [[TMPH]] 53; CHECK-NEXT: st [[RR]], [[TMPL]] 54; CHECK-NEXT: out 63, r0 55define i16 @atomic_load_sub16(ptr %foo) { 56 %val = atomicrmw sub ptr %foo, i16 13 seq_cst 57 ret i16 %val 58} 59 60; CHECK-LABEL: atomic_load_and16 61; CHECK: in r0, 63 62; CHECK-NEXT: cli 63; CHECK-NEXT: ld [[RDL:r[0-9]+]], [[RR:(X|Y|Z)]] 64; CHECK-NEXT: ldd [[RDH:r[0-9]+]], [[RR]]+1 65; CHECK-NEXT: and [[RD1L:r[0-9]+]], [[RDL]] 66; CHECK-NEXT: and [[RD1H:r[0-9]+]], [[RDH]] 67; CHECK-NEXT: std [[RR]]+1, [[RD1H]] 68; CHECK-NEXT: st [[RR]], [[RD1L]] 69; CHECK-NEXT: out 63, r0 70define i16 @atomic_load_and16(ptr %foo) { 71 %val = atomicrmw and ptr %foo, i16 13 seq_cst 72 ret i16 %val 73} 74 75; CHECK-LABEL: atomic_load_or16 76; CHECK: in r0, 63 77; CHECK-NEXT: cli 78; CHECK-NEXT: ld [[RDL:r[0-9]+]], [[RR:(X|Y|Z)]] 79; CHECK-NEXT: ldd [[RDH:r[0-9]+]], [[RR]]+1 80; CHECK-NEXT: or [[RD1L:r[0-9]+]], [[RDL]] 81; CHECK-NEXT: or [[RD1H:r[0-9]+]], [[RDH]] 82; CHECK-NEXT: std [[RR]]+1, [[RD1H]] 83; CHECK-NEXT: st [[RR]], [[RD1L]] 84; CHECK-NEXT: out 63, r0 85define i16 @atomic_load_or16(ptr %foo) { 86 %val = atomicrmw or ptr %foo, i16 13 seq_cst 87 ret i16 %val 88} 89 90; CHECK-LABEL: atomic_load_xor16 91; CHECK: in r0, 63 92; CHECK-NEXT: cli 93; CHECK-NEXT: ld [[RDL:r[0-9]+]], [[RR:(X|Y|Z)]] 94; CHECK-NEXT: ldd [[RDH:r[0-9]+]], [[RR]]+1 95; CHECK-NEXT: eor [[RD1L:r[0-9]+]], [[RDL]] 96; CHECK-NEXT: eor [[RD1H:r[0-9]+]], [[RDH]] 97; CHECK-NEXT: std [[RR]]+1, [[RD1H]] 98; CHECK-NEXT: st [[RR]], [[RD1L]] 99; CHECK-NEXT: out 63, r0 100define i16 @atomic_load_xor16(ptr %foo) { 101 %val = atomicrmw xor ptr %foo, i16 13 seq_cst 102 ret i16 %val 103} 104 105; CHECK-LABEL: atomic_load_nand16 106; CHECK: call __sync_fetch_and_nand_2 107define i16 @atomic_load_nand16(ptr %foo) { 108 %val = atomicrmw nand ptr %foo, i16 13 seq_cst 109 ret i16 %val 110} 111 112; CHECK-LABEL: atomic_load_max16 113; CHECK: call __sync_fetch_and_max_2 114define i16 @atomic_load_max16(ptr %foo) { 115 %val = atomicrmw max ptr %foo, i16 13 seq_cst 116 ret i16 %val 117} 118 119; CHECK-LABEL: atomic_load_min16 120; CHECK: call __sync_fetch_and_min_2 121define i16 @atomic_load_min16(ptr %foo) { 122 %val = atomicrmw min ptr %foo, i16 13 seq_cst 123 ret i16 %val 124} 125 126; CHECK-LABEL: atomic_load_umax16 127; CHECK: call __sync_fetch_and_umax_2 128define i16 @atomic_load_umax16(ptr %foo) { 129 %val = atomicrmw umax ptr %foo, i16 13 seq_cst 130 ret i16 %val 131} 132 133; CHECK-LABEL: atomic_load_umin16 134; CHECK: call __sync_fetch_and_umin_2 135define i16 @atomic_load_umin16(ptr %foo) { 136 %val = atomicrmw umin ptr %foo, i16 13 seq_cst 137 ret i16 %val 138} 139