xref: /llvm-project/llvm/test/CodeGen/ARM/zext-logic-shift-load.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; RUN: llc -mtriple=armv7-linux-gnu < %s -o - | FileCheck %s
2
3define void @test1(ptr %p, ptr %q) {
4; CHECK:       ldrb
5; CHECK-NEXT:  mov
6; CHECK-NEXT:  and
7; CHECK-NEXT:  strh
8; CHECK-NEXT:  bx
9
10  %1 = load i8, ptr %p
11  %2 = shl i8 %1, 2
12  %3 = and i8 %2, 12
13  %4 = zext i8 %3 to i16
14  store i16 %4, ptr %q
15  ret void
16}
17
18