1; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s 2 3%struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> } 4%struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> } 5%struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> } 6%struct.__neon_float32x2x2_t = type { <2 x float>, <2 x float> } 7%struct.__neon_int64x1x2_t = type { <1 x i64>, <1 x i64> } 8 9%struct.__neon_int8x16x2_t = type { <16 x i8>, <16 x i8> } 10%struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> } 11%struct.__neon_int32x4x2_t = type { <4 x i32>, <4 x i32> } 12%struct.__neon_float32x4x2_t = type { <4 x float>, <4 x float> } 13 14define <8 x i8> @vld2i8(ptr %A) nounwind { 15;CHECK-LABEL: vld2i8: 16;Check the alignment value. Max for this instruction is 128 bits: 17;CHECK: vld2.8 {d16, d17}, [{{r[0-9]+|lr}}:64] 18 %tmp1 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8.p0(ptr %A, i32 8) 19 %tmp2 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 0 20 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 1 21 %tmp4 = add <8 x i8> %tmp2, %tmp3 22 ret <8 x i8> %tmp4 23} 24 25define <4 x i16> @vld2i16(ptr %A) nounwind { 26;CHECK-LABEL: vld2i16: 27;Check the alignment value. Max for this instruction is 128 bits: 28;CHECK: vld2.16 {d16, d17}, [{{r[0-9]+|lr}}:128] 29 %tmp1 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16.p0(ptr %A, i32 32) 30 %tmp2 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 0 31 %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 1 32 %tmp4 = add <4 x i16> %tmp2, %tmp3 33 ret <4 x i16> %tmp4 34} 35 36define <2 x i32> @vld2i32(ptr %A) nounwind { 37;CHECK-LABEL: vld2i32: 38;CHECK: vld2.32 39 %tmp1 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32.p0(ptr %A, i32 1) 40 %tmp2 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 0 41 %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 1 42 %tmp4 = add <2 x i32> %tmp2, %tmp3 43 ret <2 x i32> %tmp4 44} 45 46define <2 x float> @vld2f(ptr %A) nounwind { 47;CHECK-LABEL: vld2f: 48;CHECK: vld2.32 49 %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32.p0(ptr %A, i32 1) 50 %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0 51 %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1 52 %tmp4 = fadd <2 x float> %tmp2, %tmp3 53 ret <2 x float> %tmp4 54} 55 56;Check for a post-increment updating load. 57define <2 x float> @vld2f_update(ptr %ptr) nounwind { 58;CHECK-LABEL: vld2f_update: 59;CHECK: vld2.32 {d16, d17}, [{{r[0-9]+|lr}}]! 60 %A = load ptr, ptr %ptr 61 %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32.p0(ptr %A, i32 1) 62 %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0 63 %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1 64 %tmp4 = fadd <2 x float> %tmp2, %tmp3 65 %tmp5 = getelementptr float, ptr %A, i32 4 66 store ptr %tmp5, ptr %ptr 67 ret <2 x float> %tmp4 68} 69 70define <1 x i64> @vld2i64(ptr %A) nounwind { 71;CHECK-LABEL: vld2i64: 72;Check the alignment value. Max for this instruction is 128 bits: 73;CHECK: vld1.64 {d16, d17}, [{{r[0-9]+|lr}}:128] 74 %tmp1 = call %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64.p0(ptr %A, i32 32) 75 %tmp2 = extractvalue %struct.__neon_int64x1x2_t %tmp1, 0 76 %tmp3 = extractvalue %struct.__neon_int64x1x2_t %tmp1, 1 77 %tmp4 = add <1 x i64> %tmp2, %tmp3 78 ret <1 x i64> %tmp4 79} 80 81define <16 x i8> @vld2Qi8(ptr %A) nounwind { 82;CHECK-LABEL: vld2Qi8: 83;Check the alignment value. Max for this instruction is 256 bits: 84;CHECK: vld2.8 {d16, d17, d18, d19}, [{{r[0-9]+|lr}}:64] 85 %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8.p0(ptr %A, i32 8) 86 %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0 87 %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1 88 %tmp4 = add <16 x i8> %tmp2, %tmp3 89 ret <16 x i8> %tmp4 90} 91 92;Check for a post-increment updating load with register increment. 93define <16 x i8> @vld2Qi8_update(ptr %ptr, i32 %inc) nounwind { 94;CHECK-LABEL: vld2Qi8_update: 95;CHECK: vld2.8 {d16, d17, d18, d19}, [{{r[0-9]+|lr}}:128], r1 96 %A = load ptr, ptr %ptr 97 %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8.p0(ptr %A, i32 16) 98 %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0 99 %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1 100 %tmp4 = add <16 x i8> %tmp2, %tmp3 101 %tmp5 = getelementptr i8, ptr %A, i32 %inc 102 store ptr %tmp5, ptr %ptr 103 ret <16 x i8> %tmp4 104} 105 106define <8 x i16> @vld2Qi16(ptr %A) nounwind { 107;CHECK-LABEL: vld2Qi16: 108;Check the alignment value. Max for this instruction is 256 bits: 109;CHECK: vld2.16 {d16, d17, d18, d19}, [{{r[0-9]+|lr}}:128] 110 %tmp1 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16.p0(ptr %A, i32 16) 111 %tmp2 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 0 112 %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 1 113 %tmp4 = add <8 x i16> %tmp2, %tmp3 114 ret <8 x i16> %tmp4 115} 116 117define <4 x i32> @vld2Qi32(ptr %A) nounwind { 118;CHECK-LABEL: vld2Qi32: 119;Check the alignment value. Max for this instruction is 256 bits: 120;CHECK: vld2.32 {d16, d17, d18, d19}, [{{r[0-9]+|lr}}:256] 121 %tmp1 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32.p0(ptr %A, i32 64) 122 %tmp2 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 0 123 %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 1 124 %tmp4 = add <4 x i32> %tmp2, %tmp3 125 ret <4 x i32> %tmp4 126} 127 128define <4 x float> @vld2Qf(ptr %A) nounwind { 129;CHECK-LABEL: vld2Qf: 130;CHECK: vld2.32 131 %tmp1 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32.p0(ptr %A, i32 1) 132 %tmp2 = extractvalue %struct.__neon_float32x4x2_t %tmp1, 0 133 %tmp3 = extractvalue %struct.__neon_float32x4x2_t %tmp1, 1 134 %tmp4 = fadd <4 x float> %tmp2, %tmp3 135 ret <4 x float> %tmp4 136} 137 138declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8.p0(ptr, i32) nounwind readonly 139declare %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16.p0(ptr, i32) nounwind readonly 140declare %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32.p0(ptr, i32) nounwind readonly 141declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32.p0(ptr, i32) nounwind readonly 142declare %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64.p0(ptr, i32) nounwind readonly 143 144declare %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8.p0(ptr, i32) nounwind readonly 145declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16.p0(ptr, i32) nounwind readonly 146declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32.p0(ptr, i32) nounwind readonly 147declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32.p0(ptr, i32) nounwind readonly 148