1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-T1 3; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2NODSP 4; RUN: llc < %s -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2DSP 5; RUN: llc < %s -mtriple=armv8a-none-eabi | FileCheck %s --check-prefix=CHECK-ARM 6 7declare i4 @llvm.usub.sat.i4(i4, i4) 8declare i8 @llvm.usub.sat.i8(i8, i8) 9declare i16 @llvm.usub.sat.i16(i16, i16) 10declare i32 @llvm.usub.sat.i32(i32, i32) 11declare i64 @llvm.usub.sat.i64(i64, i64) 12 13define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind { 14; CHECK-T1-LABEL: func32: 15; CHECK-T1: @ %bb.0: 16; CHECK-T1-NEXT: muls r1, r2, r1 17; CHECK-T1-NEXT: subs r0, r0, r1 18; CHECK-T1-NEXT: bhs .LBB0_2 19; CHECK-T1-NEXT: @ %bb.1: 20; CHECK-T1-NEXT: movs r0, #0 21; CHECK-T1-NEXT: .LBB0_2: 22; CHECK-T1-NEXT: bx lr 23; 24; CHECK-T2-LABEL: func32: 25; CHECK-T2: @ %bb.0: 26; CHECK-T2-NEXT: muls r1, r2, r1 27; CHECK-T2-NEXT: subs r0, r0, r1 28; CHECK-T2-NEXT: it lo 29; CHECK-T2-NEXT: movlo r0, #0 30; CHECK-T2-NEXT: bx lr 31; 32; CHECK-ARM-LABEL: func32: 33; CHECK-ARM: @ %bb.0: 34; CHECK-ARM-NEXT: mul r1, r1, r2 35; CHECK-ARM-NEXT: subs r0, r0, r1 36; CHECK-ARM-NEXT: movlo r0, #0 37; CHECK-ARM-NEXT: bx lr 38 %a = mul i32 %y, %z 39 %tmp = call i32 @llvm.usub.sat.i32(i32 %x, i32 %a) 40 ret i32 %tmp 41} 42 43define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind { 44; CHECK-T1-LABEL: func64: 45; CHECK-T1: @ %bb.0: 46; CHECK-T1-NEXT: .save {r4, lr} 47; CHECK-T1-NEXT: push {r4, lr} 48; CHECK-T1-NEXT: mov r2, r1 49; CHECK-T1-NEXT: movs r1, #0 50; CHECK-T1-NEXT: ldr r4, [sp, #12] 51; CHECK-T1-NEXT: ldr r3, [sp, #8] 52; CHECK-T1-NEXT: subs r3, r0, r3 53; CHECK-T1-NEXT: sbcs r2, r4 54; CHECK-T1-NEXT: mov r0, r1 55; CHECK-T1-NEXT: adcs r0, r1 56; CHECK-T1-NEXT: movs r4, #1 57; CHECK-T1-NEXT: eors r4, r0 58; CHECK-T1-NEXT: cmp r4, #0 59; CHECK-T1-NEXT: mov r0, r1 60; CHECK-T1-NEXT: beq .LBB1_3 61; CHECK-T1-NEXT: @ %bb.1: 62; CHECK-T1-NEXT: beq .LBB1_4 63; CHECK-T1-NEXT: .LBB1_2: 64; CHECK-T1-NEXT: pop {r4, pc} 65; CHECK-T1-NEXT: .LBB1_3: 66; CHECK-T1-NEXT: mov r0, r3 67; CHECK-T1-NEXT: bne .LBB1_2 68; CHECK-T1-NEXT: .LBB1_4: 69; CHECK-T1-NEXT: mov r1, r2 70; CHECK-T1-NEXT: pop {r4, pc} 71; 72; CHECK-T2-LABEL: func64: 73; CHECK-T2: @ %bb.0: 74; CHECK-T2-NEXT: ldrd r2, r3, [sp] 75; CHECK-T2-NEXT: mov.w r12, #0 76; CHECK-T2-NEXT: subs r0, r0, r2 77; CHECK-T2-NEXT: sbcs r1, r3 78; CHECK-T2-NEXT: adc r2, r12, #0 79; CHECK-T2-NEXT: teq.w r2, #1 80; CHECK-T2-NEXT: itt ne 81; CHECK-T2-NEXT: movne r0, #0 82; CHECK-T2-NEXT: movne r1, #0 83; CHECK-T2-NEXT: bx lr 84; 85; CHECK-ARM-LABEL: func64: 86; CHECK-ARM: @ %bb.0: 87; CHECK-ARM-NEXT: ldr r2, [sp] 88; CHECK-ARM-NEXT: mov r12, #0 89; CHECK-ARM-NEXT: ldr r3, [sp, #4] 90; CHECK-ARM-NEXT: subs r0, r0, r2 91; CHECK-ARM-NEXT: sbcs r1, r1, r3 92; CHECK-ARM-NEXT: adc r2, r12, #0 93; CHECK-ARM-NEXT: teq r2, #1 94; CHECK-ARM-NEXT: movwne r0, #0 95; CHECK-ARM-NEXT: movwne r1, #0 96; CHECK-ARM-NEXT: bx lr 97 %a = mul i64 %y, %z 98 %tmp = call i64 @llvm.usub.sat.i64(i64 %x, i64 %z) 99 ret i64 %tmp 100} 101 102define zeroext i16 @func16(i16 zeroext %x, i16 zeroext %y, i16 zeroext %z) nounwind { 103; CHECK-T1-LABEL: func16: 104; CHECK-T1: @ %bb.0: 105; CHECK-T1-NEXT: muls r1, r2, r1 106; CHECK-T1-NEXT: uxth r1, r1 107; CHECK-T1-NEXT: subs r0, r0, r1 108; CHECK-T1-NEXT: bhs .LBB2_2 109; CHECK-T1-NEXT: @ %bb.1: 110; CHECK-T1-NEXT: movs r0, #0 111; CHECK-T1-NEXT: .LBB2_2: 112; CHECK-T1-NEXT: bx lr 113; 114; CHECK-T2NODSP-LABEL: func16: 115; CHECK-T2NODSP: @ %bb.0: 116; CHECK-T2NODSP-NEXT: muls r1, r2, r1 117; CHECK-T2NODSP-NEXT: uxth r1, r1 118; CHECK-T2NODSP-NEXT: subs r0, r0, r1 119; CHECK-T2NODSP-NEXT: it lo 120; CHECK-T2NODSP-NEXT: movlo r0, #0 121; CHECK-T2NODSP-NEXT: bx lr 122; 123; CHECK-T2DSP-LABEL: func16: 124; CHECK-T2DSP: @ %bb.0: 125; CHECK-T2DSP-NEXT: muls r1, r2, r1 126; CHECK-T2DSP-NEXT: uqsub16 r0, r0, r1 127; CHECK-T2DSP-NEXT: uxth r0, r0 128; CHECK-T2DSP-NEXT: bx lr 129; 130; CHECK-ARM-LABEL: func16: 131; CHECK-ARM: @ %bb.0: 132; CHECK-ARM-NEXT: mul r1, r1, r2 133; CHECK-ARM-NEXT: uqsub16 r0, r0, r1 134; CHECK-ARM-NEXT: uxth r0, r0 135; CHECK-ARM-NEXT: bx lr 136 %a = mul i16 %y, %z 137 %tmp = call i16 @llvm.usub.sat.i16(i16 %x, i16 %a) 138 ret i16 %tmp 139} 140 141define zeroext i8 @func8(i8 zeroext %x, i8 zeroext %y, i8 zeroext %z) nounwind { 142; CHECK-T1-LABEL: func8: 143; CHECK-T1: @ %bb.0: 144; CHECK-T1-NEXT: muls r1, r2, r1 145; CHECK-T1-NEXT: uxtb r1, r1 146; CHECK-T1-NEXT: subs r0, r0, r1 147; CHECK-T1-NEXT: bhs .LBB3_2 148; CHECK-T1-NEXT: @ %bb.1: 149; CHECK-T1-NEXT: movs r0, #0 150; CHECK-T1-NEXT: .LBB3_2: 151; CHECK-T1-NEXT: bx lr 152; 153; CHECK-T2NODSP-LABEL: func8: 154; CHECK-T2NODSP: @ %bb.0: 155; CHECK-T2NODSP-NEXT: muls r1, r2, r1 156; CHECK-T2NODSP-NEXT: uxtb r1, r1 157; CHECK-T2NODSP-NEXT: subs r0, r0, r1 158; CHECK-T2NODSP-NEXT: it lo 159; CHECK-T2NODSP-NEXT: movlo r0, #0 160; CHECK-T2NODSP-NEXT: bx lr 161; 162; CHECK-T2DSP-LABEL: func8: 163; CHECK-T2DSP: @ %bb.0: 164; CHECK-T2DSP-NEXT: muls r1, r2, r1 165; CHECK-T2DSP-NEXT: uqsub8 r0, r0, r1 166; CHECK-T2DSP-NEXT: uxtb r0, r0 167; CHECK-T2DSP-NEXT: bx lr 168; 169; CHECK-ARM-LABEL: func8: 170; CHECK-ARM: @ %bb.0: 171; CHECK-ARM-NEXT: smulbb r1, r1, r2 172; CHECK-ARM-NEXT: uqsub8 r0, r0, r1 173; CHECK-ARM-NEXT: uxtb r0, r0 174; CHECK-ARM-NEXT: bx lr 175 %a = mul i8 %y, %z 176 %tmp = call i8 @llvm.usub.sat.i8(i8 %x, i8 %a) 177 ret i8 %tmp 178} 179 180define zeroext i4 @func4(i4 zeroext %x, i4 zeroext %y, i4 zeroext %z) nounwind { 181; CHECK-T1-LABEL: func4: 182; CHECK-T1: @ %bb.0: 183; CHECK-T1-NEXT: muls r1, r2, r1 184; CHECK-T1-NEXT: movs r2, #15 185; CHECK-T1-NEXT: ands r2, r1 186; CHECK-T1-NEXT: subs r0, r0, r2 187; CHECK-T1-NEXT: bhs .LBB4_2 188; CHECK-T1-NEXT: @ %bb.1: 189; CHECK-T1-NEXT: movs r0, #0 190; CHECK-T1-NEXT: .LBB4_2: 191; CHECK-T1-NEXT: bx lr 192; 193; CHECK-T2-LABEL: func4: 194; CHECK-T2: @ %bb.0: 195; CHECK-T2-NEXT: muls r1, r2, r1 196; CHECK-T2-NEXT: and r1, r1, #15 197; CHECK-T2-NEXT: subs r0, r0, r1 198; CHECK-T2-NEXT: it lo 199; CHECK-T2-NEXT: movlo r0, #0 200; CHECK-T2-NEXT: bx lr 201; 202; CHECK-ARM-LABEL: func4: 203; CHECK-ARM: @ %bb.0: 204; CHECK-ARM-NEXT: smulbb r1, r1, r2 205; CHECK-ARM-NEXT: and r1, r1, #15 206; CHECK-ARM-NEXT: subs r0, r0, r1 207; CHECK-ARM-NEXT: movlo r0, #0 208; CHECK-ARM-NEXT: bx lr 209 %a = mul i4 %y, %z 210 %tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %a) 211 ret i4 %tmp 212} 213