1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-T1 3; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2NODSP 4; RUN: llc < %s -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2DSP 5; RUN: llc < %s -mtriple=armv8a-none-eabi | FileCheck %s --check-prefix=CHECK-ARM 6 7declare i4 @llvm.usub.sat.i4(i4, i4) 8declare i8 @llvm.usub.sat.i8(i8, i8) 9declare i16 @llvm.usub.sat.i16(i16, i16) 10declare i32 @llvm.usub.sat.i32(i32, i32) 11declare i64 @llvm.usub.sat.i64(i64, i64) 12 13define i32 @func(i32 %x, i32 %y) nounwind { 14; CHECK-T1-LABEL: func: 15; CHECK-T1: @ %bb.0: 16; CHECK-T1-NEXT: subs r0, r0, r1 17; CHECK-T1-NEXT: bhs .LBB0_2 18; CHECK-T1-NEXT: @ %bb.1: 19; CHECK-T1-NEXT: movs r0, #0 20; CHECK-T1-NEXT: .LBB0_2: 21; CHECK-T1-NEXT: bx lr 22; 23; CHECK-T2-LABEL: func: 24; CHECK-T2: @ %bb.0: 25; CHECK-T2-NEXT: subs r0, r0, r1 26; CHECK-T2-NEXT: it lo 27; CHECK-T2-NEXT: movlo r0, #0 28; CHECK-T2-NEXT: bx lr 29; 30; CHECK-ARM-LABEL: func: 31; CHECK-ARM: @ %bb.0: 32; CHECK-ARM-NEXT: subs r0, r0, r1 33; CHECK-ARM-NEXT: movlo r0, #0 34; CHECK-ARM-NEXT: bx lr 35 %tmp = call i32 @llvm.usub.sat.i32(i32 %x, i32 %y) 36 ret i32 %tmp 37} 38 39define i64 @func2(i64 %x, i64 %y) nounwind { 40; CHECK-T1-LABEL: func2: 41; CHECK-T1: @ %bb.0: 42; CHECK-T1-NEXT: .save {r4, lr} 43; CHECK-T1-NEXT: push {r4, lr} 44; CHECK-T1-NEXT: mov r4, r1 45; CHECK-T1-NEXT: movs r1, #0 46; CHECK-T1-NEXT: subs r2, r0, r2 47; CHECK-T1-NEXT: sbcs r4, r3 48; CHECK-T1-NEXT: mov r0, r1 49; CHECK-T1-NEXT: adcs r0, r1 50; CHECK-T1-NEXT: movs r3, #1 51; CHECK-T1-NEXT: eors r3, r0 52; CHECK-T1-NEXT: cmp r3, #0 53; CHECK-T1-NEXT: mov r0, r1 54; CHECK-T1-NEXT: beq .LBB1_3 55; CHECK-T1-NEXT: @ %bb.1: 56; CHECK-T1-NEXT: beq .LBB1_4 57; CHECK-T1-NEXT: .LBB1_2: 58; CHECK-T1-NEXT: pop {r4, pc} 59; CHECK-T1-NEXT: .LBB1_3: 60; CHECK-T1-NEXT: mov r0, r2 61; CHECK-T1-NEXT: bne .LBB1_2 62; CHECK-T1-NEXT: .LBB1_4: 63; CHECK-T1-NEXT: mov r1, r4 64; CHECK-T1-NEXT: pop {r4, pc} 65; 66; CHECK-T2-LABEL: func2: 67; CHECK-T2: @ %bb.0: 68; CHECK-T2-NEXT: subs r0, r0, r2 69; CHECK-T2-NEXT: mov.w r12, #0 70; CHECK-T2-NEXT: sbcs r1, r3 71; CHECK-T2-NEXT: adc r2, r12, #0 72; CHECK-T2-NEXT: teq.w r2, #1 73; CHECK-T2-NEXT: itt ne 74; CHECK-T2-NEXT: movne r0, #0 75; CHECK-T2-NEXT: movne r1, #0 76; CHECK-T2-NEXT: bx lr 77; 78; CHECK-ARM-LABEL: func2: 79; CHECK-ARM: @ %bb.0: 80; CHECK-ARM-NEXT: subs r0, r0, r2 81; CHECK-ARM-NEXT: mov r12, #0 82; CHECK-ARM-NEXT: sbcs r1, r1, r3 83; CHECK-ARM-NEXT: adc r2, r12, #0 84; CHECK-ARM-NEXT: teq r2, #1 85; CHECK-ARM-NEXT: movwne r0, #0 86; CHECK-ARM-NEXT: movwne r1, #0 87; CHECK-ARM-NEXT: bx lr 88 %tmp = call i64 @llvm.usub.sat.i64(i64 %x, i64 %y) 89 ret i64 %tmp 90} 91 92define zeroext i16 @func16(i16 zeroext %x, i16 zeroext %y) nounwind { 93; CHECK-T1-LABEL: func16: 94; CHECK-T1: @ %bb.0: 95; CHECK-T1-NEXT: subs r0, r0, r1 96; CHECK-T1-NEXT: bhs .LBB2_2 97; CHECK-T1-NEXT: @ %bb.1: 98; CHECK-T1-NEXT: movs r0, #0 99; CHECK-T1-NEXT: .LBB2_2: 100; CHECK-T1-NEXT: bx lr 101; 102; CHECK-T2NODSP-LABEL: func16: 103; CHECK-T2NODSP: @ %bb.0: 104; CHECK-T2NODSP-NEXT: subs r0, r0, r1 105; CHECK-T2NODSP-NEXT: it lo 106; CHECK-T2NODSP-NEXT: movlo r0, #0 107; CHECK-T2NODSP-NEXT: bx lr 108; 109; CHECK-T2DSP-LABEL: func16: 110; CHECK-T2DSP: @ %bb.0: 111; CHECK-T2DSP-NEXT: uqsub16 r0, r0, r1 112; CHECK-T2DSP-NEXT: uxth r0, r0 113; CHECK-T2DSP-NEXT: bx lr 114; 115; CHECK-ARM-LABEL: func16: 116; CHECK-ARM: @ %bb.0: 117; CHECK-ARM-NEXT: uqsub16 r0, r0, r1 118; CHECK-ARM-NEXT: uxth r0, r0 119; CHECK-ARM-NEXT: bx lr 120 %tmp = call i16 @llvm.usub.sat.i16(i16 %x, i16 %y) 121 ret i16 %tmp 122} 123 124define zeroext i8 @func8(i8 zeroext %x, i8 zeroext %y) nounwind { 125; CHECK-T1-LABEL: func8: 126; CHECK-T1: @ %bb.0: 127; CHECK-T1-NEXT: subs r0, r0, r1 128; CHECK-T1-NEXT: bhs .LBB3_2 129; CHECK-T1-NEXT: @ %bb.1: 130; CHECK-T1-NEXT: movs r0, #0 131; CHECK-T1-NEXT: .LBB3_2: 132; CHECK-T1-NEXT: bx lr 133; 134; CHECK-T2NODSP-LABEL: func8: 135; CHECK-T2NODSP: @ %bb.0: 136; CHECK-T2NODSP-NEXT: subs r0, r0, r1 137; CHECK-T2NODSP-NEXT: it lo 138; CHECK-T2NODSP-NEXT: movlo r0, #0 139; CHECK-T2NODSP-NEXT: bx lr 140; 141; CHECK-T2DSP-LABEL: func8: 142; CHECK-T2DSP: @ %bb.0: 143; CHECK-T2DSP-NEXT: uqsub8 r0, r0, r1 144; CHECK-T2DSP-NEXT: uxtb r0, r0 145; CHECK-T2DSP-NEXT: bx lr 146; 147; CHECK-ARM-LABEL: func8: 148; CHECK-ARM: @ %bb.0: 149; CHECK-ARM-NEXT: uqsub8 r0, r0, r1 150; CHECK-ARM-NEXT: uxtb r0, r0 151; CHECK-ARM-NEXT: bx lr 152 %tmp = call i8 @llvm.usub.sat.i8(i8 %x, i8 %y) 153 ret i8 %tmp 154} 155 156define zeroext i4 @func3(i4 zeroext %x, i4 zeroext %y) nounwind { 157; CHECK-T1-LABEL: func3: 158; CHECK-T1: @ %bb.0: 159; CHECK-T1-NEXT: subs r0, r0, r1 160; CHECK-T1-NEXT: bhs .LBB4_2 161; CHECK-T1-NEXT: @ %bb.1: 162; CHECK-T1-NEXT: movs r0, #0 163; CHECK-T1-NEXT: .LBB4_2: 164; CHECK-T1-NEXT: bx lr 165; 166; CHECK-T2-LABEL: func3: 167; CHECK-T2: @ %bb.0: 168; CHECK-T2-NEXT: subs r0, r0, r1 169; CHECK-T2-NEXT: it lo 170; CHECK-T2-NEXT: movlo r0, #0 171; CHECK-T2-NEXT: bx lr 172; 173; CHECK-ARM-LABEL: func3: 174; CHECK-ARM: @ %bb.0: 175; CHECK-ARM-NEXT: subs r0, r0, r1 176; CHECK-ARM-NEXT: movlo r0, #0 177; CHECK-ARM-NEXT: bx lr 178 %tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %y) 179 ret i4 %tmp 180} 181