1; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA 2; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52plus | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA 3; RUN: llc < %s -mtriple=armv7m-eabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA 4; RUN: llc < %s -mtriple=armv8m-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA 5; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA 6 7; Check we use AA during codegen, so can interleave these loads/stores. 8 9; CHECK-LABEL: test 10; USEAA: ldr 11; USEAA: ldr 12; USEAA: str 13; USEAA: str 14 15define void @test(ptr nocapture %a, ptr noalias nocapture %b) { 16entry: 17 %0 = load i32, ptr %a, align 4 18 %add = add nsw i32 %0, 10 19 store i32 %add, ptr %a, align 4 20 %1 = load i32, ptr %b, align 4 21 %add2 = add nsw i32 %1, 20 22 store i32 %add2, ptr %b, align 4 23 ret void 24} 25 26